Hardware
1 hardware offering
-
Evaluation and Development BoardsDisplayPort Linear Redriver Evaluation Board for PTN3816
20 Gbps Per Lane, 4-Lane DisplayPort Linear Redriver
PTN3816 Receive alerts
- Not Recommended for New Designs
- This page contains information on a product that is not recommended for new designs.
PTN3816 is a high performance 20 Gbps per lane, 4 lane DisplayPort linear redriver for DisplayPort upstream (DP source side) and downstream (DP Sink side) applications. It is used to improve high-speed signal quality in DisplayPort interfaces in various platforms and applications.
The device provides pin programmable receive equalization, output linearity control to improve signal integrity and enable channel extension by reducing Inter-Symbol Interference (ISI). This IC also implements AUX snooping to monitor the AUX signals to optimally configure the link and achieve power saving and SI performance.
PTN3816 has control pins for application-specific configurability. These pins can either be strapped appropriately on the PCB or connected to a microcontroller’s GPIO pins.
PTN3816 is powered from 1.8 V supply. It is available in a small high performance HWFLGA36 package with 2.1 mm x 6.0 mm x 0.6 mm size and 0.4 mm pitch.
PTN3816 Chip Shot
Product Details
Features
Key Features
- Implements DisplayPort linear redriver that can operate for various link rates -
- 1.62 Gbps (RBR), 2.7 Gbps (HBR), 5.4 Gbps (HBR2), 8.1 Gbps (HBR3), 10, 13.5 and 20 Gbps
- Supports configurable number of lanes: 1, 2 and 4
- DP AUX monitoring for link configuration and power management
- Implements Hot Plug Detect (HPD) for deep power saving
- GPIO configurable output swing linearity control and Rx equalizer gain setting eliminates need for I2C register configuration
- High-Speed redriver path supports DP++ mode that targets DP to HDMI interface use
- Supports maximum voltage limit (Vvoltage_jump) to align to the latest system platform capabilities
- Integrated termination resistors provide impedance matching on transmit and receive sides
- Good linearity over the frequency band and voltage dynamic range
- Excellent Differential return loss performance
- Pin-out minimizes PCB crosstalk effects
-
Low active current consumption for output linearity control setting
of 950 mVppd
- 1-lane DP: 62 mA (typ)
- 2-lane DP: 125 mA (typ)
- 4-lane DP: 250 mA (typ)
- Power–saving state:
- DisplayPort sleep D3 mode: 3.2 mA (typ)
- 10 μA (typ) when in deep power-saving state (when HPD is LOW)
- Power Supply 1.7 V to 1.9 V
-
Small high performance HWFLGA36 package
- 2.1 mm x 6.0 mm x 0.6 mm with 0.4 mm pitch
- ESD HBM 1.5 kV CDM 1 kV
- Operating temperature range -20 °C to +85 °C