Hot Swappable I²C-Bus and SMBus Bus Buffer

PCA9513A_PCA9514A

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Block Diagram

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PCA9513A-PCA9514A Block Diagram

PCA9513A-PCA9514A Block Diagram

Block diagram: PCA9511AD, PCA9511ADP, PCA9513AD, PCA9513ADP, PCA9514AD, PCA9514ADP

Block diagram: PCA9513AD, PCA9513ADP, PCA9514AD, PCA9514ADP

Block diagram: PCA9513AD, PCA9513ADP, PCA9514AD, PCA9514ADP

Block diagram: PCA9513AD, PCA9513ADP, PCA9514AD, PCA9514ADP

Features

System Features

  • Bidirectional buffer for SDA and SCL lines increases fan-out and prevents SDA and SCL corruption during live board insertion and removal from multipoint backplane systems
  • Compatible with I2C-bus Standard mode, I2C-bus Fast mode and SMBus standards
  • Built-in ΔV/Δt rise time accelerators on all SDA and SCL lines (0.8 V threshold) requires the bus pull-up voltage and supply voltage (VCC) to be the same
  • Rise time accelerator threshold moved from 0.6 V to 0.8 V for improved noise margin
  • Active HIGH ENABLE input
  • Active HIGH READY open-drain output
  • High-impedance SDAn and SCLn pins for VCC = 0 V
  • 92 uA current source on SCLIN and SDAIN for PICMG backplane applications (PCA9513A only)
  • Supports clock stretching and multiple controller arbitration and synchronization
  • Operating power supply voltage range: 2.7 V to 5.5 V
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Packages offered: SO8, TSSOP8 (MSOP8)

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