Dual Bidirectional Bus Buffer

Block Diagram

PCA9600

PCA9600 Block Diagram

Features

Key Features

  • idirectional data transfer of I²C-bus signals
  • Isolates capacitance allowing 400 pF on SX/SY side and 4000 pF on TX/TY side
  • TX/TY outputs have 60 mA sink capability for driving low-impedance or high-capacitive buses
  • 1 MHz operation on up to 20 meters of wire (see AN10658)
  • Supply voltage range of 2.5 V to 15 V with I²C-bus logic levels on SX/SY side independent of supply voltage
  • Splits I²C-bus signal into pairs of forward/reverse TX/RX, TY/RY signals for interface with opto-electrical isolators and similar devices that need unidirectional input and output signal paths
  • Low power supply current
  • ESD protection exceeds 3500 V HBM per JESD22-A114 and 1400 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

Packages Offered

  • SO8, TSSOP8 (MSOP8)

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Documentation

Quick reference to our documentation types

1-10 of 14 documents

Compact List

Application Note (5)
Brochure (2)
Data Sheet (1)
Package Information (1)
Packing Information (2)

Design Files

Quick reference to our design files types.

4 design files

Engineering Services

1 engineering service

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