LCD Driver for Low Multiplex Rates

PCA85132U

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Block Diagram

PCA85132 BLOCK DIAGRAM

PCA85132 BLOCK DIAGRAM

Features

  • AEC-Q100 compliant for automotive applications
  • Single-chip LCD controller and driver for up to 640 elements
  • Selectable backplane drive configuration: static, 2, 3, or 4 backplane multiplexing
  • 160 segment drives:
    • Up to 80 7-segment numeric characters
    • Up to 40 14-segment alphanumeric characters
    • Any graphics of up to 640 elements
  • May be cascaded for large LCD applications (up to 5120 elements possible)
  • 160 × 4-bit RAM for display data storage
  • Software programmable frame frequency in steps of 5 Hz in the range of 60 Hz to 90 Hz; factory calibrated
  • Wide LCD supply range: from 1.8 V for low threshold LCDs and up to 8.0 V for guest-host LCDs and high threshold (automobile) twisted nematic LCDs
  • Internal LCD bias generation with voltage-follower buffers
  • Selectable display bias configuration: static, 1/2, or 1/3
  • Wide power supply range: from 1.8 V to 5.5 V
  • LCD and logic supplies may be separated
  • Low power consumption, typical: IDD = 4 μA, IDD(LCD) = 30 μA
  • 400 kHz I²C-bus interface
  • Auto-incremental display data loading across device subaddress boundaries
  • Versatile blinking modes
  • Compatible with Chip-On-Glass (COG) technology
  • No external components
  • Two sets of backplane outputs for optimal COG configurations of the application

Design Resources

Documentation

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