KIT33903BD3EVBE: Evaluation Kit - MC33903BD3, SBC Gen2 with CAN and LIN

Overview

This evaluation board allows you to implement the functionality of the MC33903D3 System Basis Chip (SBC).

Includes one I/O test point that can be configured to be pulled up to VSUP or pulled down to GND through a resistor and indicator LED
The SBC can also be exercised in debug mode by simply populating a jumper
An isolated terminal block connector is implemented to provide power to the evaluation board with an external DC power supply
Operated through the graphical user interface (GUI) paired with the SPI dongle board (KITUSBSPIDGLEVME) through the 2 x 8 pin ribbon cable
For added flexibility, you can implement a custom board with a MCU to talk to the SBC via the 16 pin header

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Target Applications

Hybrid Electric Vehicle (HEV) Applications

NXP<sup>®</sup> KIT33903BDxEVBE Evaluation Kit Product Image

Specifications

Supported Devices

Interfaces

MC33903 : SBC Gen2 with High-Speed CAN and LIN

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Technical and Functional Specifications

Connectivity	Multiple CAN Bus termination options supported via socket One high/low side I/O (SPI configurable) accessible through a test point
Power Management	Nominal operating supply voltage range of 5.5 to 27 V 5.0 V/3.3 V regulator for the MCU with an external PNP ballast transistor to increase current capability
Debug	Debug mode/watchdog configuration via jumper settings
General Specifications	Status of I/O-0 indicated by LED (dependent on jumper configuration) I/O-0, 5 V_CAN, SAFE, and VDD status indicated by LED MUX output voltage accessible through a test point and external resistor selectable through a jumper I_WAKE_I test point to enable a FET and load VDD with current to wake up the SBC LIN1_T and LIN2_T test points to monitor I/O voltages (SPI configurable) 100 mil 2 x 8 pin standard header connector for SPI communication 100 mil 16-pin standard header connector for custom MCU board connection

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KIT33903BD3EVBE ^Active
Evaluation Kit - MC33903BD3, SBC Gen2 with CAN High Speed and LIN Interface
- KIT33903BD3EVBE Hardware
- Quick Reference Guide

KIT33903BD3EVBE
1 @ US
$85.00

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Design Resources

Get Started

Get Started with the KIT33903BD3EVBE

User Guide

Everything you need to get started with the KIT33903BD3EVBE

KIT33903BD5EVBE, KIT33903BD3EVBE, Evaluation Boards - User Guide^{(REV
1.0
)}
- 3.6 MB
- KT33903UG
- [ English ]

Software ( 1 )

Development Software ( 1 )
- Components and Modules ( 1 )

Documents

Data Sheet ( 1 )

MC33903-MC33904-MC33905, System Basis Chip Gen2 with High Speed CAN and LIN Interface - Data Sheet^{(REV
14.0
)}

The 33903/4/5 is the second generation family of the System Basis Chip (SBC).
- PDF
- 2.9 MB
- 01 Feb 2018
- MC33903-MC33904-MC33905
- [ English ]

User Guide ( 1 )

KIT33903BD5EVBE, KIT33903BD3EVBE, Evaluation Boards - User Guide^{(REV
1.0
)}

This evaluation board allows the user to implement the functionality of the MC33903 product System Basis Chip (SBC).
- PDF
- 3.6 MB
- 19 Sep 2011
- KT33903UG
- [ English ]

Software

Development Software ( 1 )

Components and Modules ( 1 )

KIT33903_5 SPIGEN Configuration File^{(REV
1
)}
- SPI
- 6.2 kB
- 2013-05-06 00:00:00
- KIT33903_5SW
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KIT33903BD3EVBE: Evaluation Kit - MC33903BD3, SBC Gen2 with CAN and LIN

Overview

Target Applications

Specifications

Supported Devices

Interfaces

Technical and Functional Specifications

Buy

KIT33903BD3EVBE Active

Related Products

Design Resources

Get Started

User Guide

Documents ( 2 )

Software ( 1 )

Documents

Data Sheet ( 1 )

MC33903-MC33904-MC33905, System Basis Chip Gen2 with High Speed CAN and LIN Interface - Data Sheet (REV 14.0 )

User Guide ( 1 )

KIT33903BD5EVBE, KIT33903BD3EVBE, Evaluation Boards - User Guide (REV 1.0 )

Software

Development Software ( 1 )

Components and Modules ( 1 )

KIT33903_5 SPIGEN Configuration File (REV 1 )

KIT33903BD3EVBE ^Active

MC33903-MC33904-MC33905, System Basis Chip Gen2 with High Speed CAN and LIN Interface - Data Sheet^{(REV
14.0
)}

KIT33903BD5EVBE, KIT33903BD3EVBE, Evaluation Boards - User Guide^{(REV
1.0
)}

KIT33903_5 SPIGEN Configuration File^{(REV
1
)}