Hot Swappable I²C-Bus and SMBus Bus Buffer


Product Details

Block Diagram

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PCA9510A Block Diagram

PCA9510A Block Diagram

Block diagram: PCA9510AD, PCA9510ADP

Block diagram: PCA9510AD, PCA9510ADP


System Features

  • Bidirectional buffer for SDA and SCL lines increases fan-out and prevents SDA and SCL corruption during live board insertion and removal from multipoint backplane systems
  • Compatible with Standard-mode I²C-bus, Fast-mode I²C-bus, and SMBus standards
  • Active HIGH ENABLE input
  • Active HIGH READY open-drain output
  • High-impedance SDAn and SCLn pins for VCC = 0 V
  • 1 V precharge on SDAIN and SCLIN inputs
  • Supports clock stretching and multiple controller arbitration and synchronization
  • Operating power supply voltage range: 2.7 V to 5.5 V
  • 5 V tolerant I/Os
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Packages offered: SO8, TSSOP8 (MSOP8)

Part numbers include: PCA9510AD, PCA9510ADP.


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