Four-Channel I²C-Bus Multiplexer with Interrupt Logic


Product Details

Select a section:

Block Diagram

Choose a diagram:

PCA9544A Block Diagram

PCA9544A Block Diagram

Block diagram: PCA9544ABS, PCA9544AD, PCA9544APW


  • 1-of-4 bidirectional translating multiplexer
  • I²C-bus interface logic; compatible with SMBus
  • 4 active LOW interrupt inputs
  • Active LOW interrupt output
  • 3 address pins allowing up to 8 devices on the I²C-bus
  • Channel selection via I²C-bus
  • Power-up with all multiplexer channels deselected
  • Low Ron switches
  • Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
  • No glitch on power-up
  • Supports hot insertion
  • Low standby current
  • Operating power supply voltage range of 2.3 V to 5.5 V
  • 5 V tolerant Inputs
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Three packages offered: SO20, TSSOP20 and HVQFN20


Quick reference to our documentation types.

1-5 of 14 documents

Show All

Design Resources

Select a section:

Design Files

4 design files

  • Models

    PCA9544A IBIS model

  • Symbols and Footprints

    PCA9544ABS-HVQFN20-CAD Symbol and PCB Footprint – BXL File

  • Symbols and Footprints

    PCA9544APW-TSSOP20-CAD Symbol and PCB Footprint – BXL File

  • Design Files - miscellaneous

    Expert mode sample code PCA9544A


What do you need help with?