Four-Channel I²C-Bus Multiplexer with Interrupt Logic

PCA9544A

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Block Diagram

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PCA9544A Block Diagram

PCA9544A Block Diagram

Block diagram: PCA9544ABS, PCA9544AD, PCA9544APW

Features

  • 1-of-4 bidirectional translating multiplexer
  • I²C-bus interface logic; compatible with SMBus
  • 4 active LOW interrupt inputs
  • Active LOW interrupt output
  • 3 address pins allowing up to 8 devices on the I²C-bus
  • Channel selection via I²C-bus
  • Power-up with all multiplexer channels deselected
  • Low Ron switches
  • Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
  • No glitch on power-up
  • Supports hot insertion
  • Low standby current
  • Operating power supply voltage range of 2.3 V to 5.5 V
  • 5 V tolerant Inputs
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Three packages offered: SO20, TSSOP20 and HVQFN20

Documentation

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Design Resources

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Design Files

4 design files

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