System Basis Chip with CAN High-Speed and LIN Interface

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Block Diagram

Simplified Application Drawing

NXP<sup>&#174;</sup> MC34905 Internal Block Diagram - 30295

Features

  • Voltage regulator for MCU, 5.0 or 3.3 V, part number selectable, with possibility of usage external PNP to extend current capability and share power dissipation
  • Very low quiescent current in LP modes
  • Fully protected embedded 5.0 V regulator for the CAN driver
  • Multiple undervoltage detections to address various MCU specifications and system operation modes
  • Auxiliary 5.0 or 3.3 V SPI configurable regulator, for additional ICs, with overcurrent detection and undervoltage protection
  • MUX output pin for device internal analog signal monitoring and power supply monitoring
  • Advanced SPI, MCU, ECU power supply, and critical pins diagnostics and monitoring.
  • Multiple wake-up sources in LP modes: CAN or LIN bus, I/O transition, automatic timer, SPI message, and VDD overcurrent detection.
  • ISO11898-5 high-speed CAN interface compatibility for baud rates of 40 kb/s to 1.0 Mb/s
  • Scalable product family of devices ranging from 0 to 1 LIN, compatible to J2602-2 and LIN 2.1

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Hardware

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