12 V / 24 V / 48 V Safety System Basis Chip for ASIL D

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Block Diagram

FS27

FS27 Block Diagram

Features

Power Management

  • 70 V DC maximum input voltage to support 48 V, 24 V or 12 V board nets
  • Front or back boost controller configurable from 5 V to 24 V, 200 / 450 / 2200 kHz, external low-side n-type metal-oxide-semiconductor (LS NMOS)
  • Dedicated core supply (0.8 V to 5 V) of up to 3.5A for powering 28 nm processors
  • Low-power off mode with very low sleep current (30 uA Typ.)
  • Low-power Standby mode, pre-regulator voltage (VPRE) active. LDO1 or LDO2 active selectable via one-time programming (OTP) configuration (25 uA Typ.)
  • Multiple switch mode regulators as well as LDO voltage regulators to supply the microcontroller, sensors, peripheral ICs and communication interface

System Solutions

  • System added value to save space and reduce complexity: long-duration timer (LDT), analog multiplexer (AMUX), Dual Tracker, voltage reference (Vref)
  • Programmable LDT system for turn-off/wake-up control
  • Selectable wake-up sources from: wake/general-purpose input/output (WAKE/GPIO) pins, LDT or serial peripheral interface (SPI) activity

Functional Safety

  • Scalable portfolio from automotive safety integrity levels ASIL B to ASIL D
  • Enable latent fault monitoring when the system is running: analog built-in self-test (ABIST) on-demand
  • Independent monitoring circuitry
  • Dedicated interface for microcontroller monitoring
  • Simple and challenger watchdog function
  • Safety outputs with latent fault detection mechanism (reset bar (RSTB), fail-safe 0 bar (FS0B)/limp mode (LIMP), fail-safe 1 bar (FS1B))

Configuration and Enablement

  • low-profile quad flat package (LQFP) 48 pins with exposed pad for optimized thermal management
  • Permanent device customization via OTP fuse memory
  • Temporary OTP emulation mode for system development and evaluation

Documentation

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Design Resources

Design Files

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Hardware

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