LIN Core System Basis Chip


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Block Diagram

UJA1079ATW Block Diagram

UJA1079ATW Block Diagram



  • Designed for automotive applications according to ISO 11898-2/5
  • ±8 kV ESD protection Human Body Model (HBM) on the CAN/LIN bus pins and the wake-up pins
  • ±6 kV ESD protection IEC 61000-4-2 on the CAN/LIN bus pins and the wake-up pins
  • ±58 V short-circuit proof CAN/LIN bus pins
  • Battery and CAN/LIN bus pins are protected against transients in accordance with ISO 7637-3

Low-drop voltage regulators (LDOs)

  • V1 voltage regulator 5 V or 3.3 V with 250 mA output current capability
  • V1 can be combined with an external PNP transistor for better heat distribution over the PCB

LIN transceiver

  • LIN 2.1 and SAE J2602 compliant transceiver
  • Integrated LIN termination diode at pin DLIN

System control features

  • Wake-up via CAN, LIN or two local wake-up pins with wake-up source detection
  • Programmable watchdog with independent clock source
  • 16-bit Serial Peripheral Interface (SPI) for configuration, control and diagnosis
  • Global enable output for controlling safety-critical hardware
  • Limp home output (LIMP)

Part numbers include: UJA1079ATW.


Quick reference to our documentation types.

2 documents

Design Resources



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