Usage Information
The ADC / DAC analog subsystem supports a zero-IF I/Q interface toward an RFIC. With a sample rate of up to 153M
samples per second, is suitable for both sub-6GHz and limited bandwidth mmWave applications. The Vector Signal
Processing Accelerator (VSPA) DSP leverages NXP supplied software libraries to efficiently implement sample-level
baseband processing in the digital domain (that is, digital up/down conversion, digital filtering, et cetera), enabling a
flexible software defined radio for standard and proprietary protocols. Results are provided to the host, typically an
LS1023A or LS1043A, over a x1 Gen3 PCIe interface. The device includes DMA engines, timing blocks and RF control
interfaces such as I2C, SPI and proprietary LLCP signaling.
In addition, the LA9310 is intended for use in industrial and measurement use-cases. For such applications, the LA9310
functions as a lookaside accelerator to a host processor such as the i.MX family of devices, functioning as a signal
preprocessor that includes analog sample acquisition together with initial DSP (filter/data reduction) processing, or
as a math accelerator. In these use-cases, the lookaside accelerator often replaces an FPGA, connecting over PCIe or
Ethernet.
Software Support
NXP provides a BSP for the LA9310 that includes drivers for all chip capabilities, example hello-world application
that exercise the full data path of the device, VSPA libraries and FreeRTOS running on the M4 core. Reference code
for target applications is available.
CodeWarrior for VSPA enables users to compile and debug VSPA code.
Hardware Tools
The LA9310 Reference Design Kit is a standalone system that consists of an LA9310 daughter card plugged into an
LS1043A Reference Design Board. Customers can copy its design, use it to evaluate performance, and use it to debug
their own hardware.