Ara Software Development Kit

Diagram

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Machine learning deployment flow

ARA-1-DNPU-BD

NXP Applications Processor and Ara DNPU Connection

ARA-1-DNPU-BD-2

Integration of Ara DNPU and Applications Processors Host with Drivers

ARA-1-DNPU-BD-3

Key Features

  • Optimal execution planning to automatically determine efficient data and compute flow for any AI graph
  • Extensible compiler that supports models from CNNs to complex vision transformers and Large Language Models
  • Programmable compute engines easily accommodate new model operators
  • Multiple datatype support - Handles INT8 (Ara-1, Ara-2), INT4, and MSFP16 (Ara-2 only)
  • Software-defined tensor partitioning and routing optimized for dataflow
  • Flexible quantization methods

Supported Devices

  • ARA-2-DNPU: Ara-2: Discrete NPU for Real-Time Generative AI
  • ARA-1-DNPU: Ara-1: Discrete NPU for Optimized Edge AI

Design Resources

Hardware

Quick reference to our board types.

4 hardware offerings

Support

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