Dual Bidirectional Bus Buffer

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Product Details

Block Diagram

P82B96 Block Diagram

P82B96 Block Diagram



  • Bidirectional data transfer of IC-bus signals
  • Isolates capacitance allowing 400 pF on Sx/Sy side and 4000 pF on Tx/Ty side
  • Tx/Ty outputs have 60 mA sink capability for driving low-impedance or high capacitive buses
  • 400 kHz operation over at least 20 meters of wire (see AN10148)
  • Supply voltage range of 2 V to 15 V with IC-bus logic levels on Sx/Sy side independent of supply voltage
  • Splits IC-bus signal into pairs of forward/reverse Tx/Rx, Ty/Ry signals for interface with opto-electrical isolators and similar devices that need unidirectional input and output signal paths.
  • Low power supply current
  • ESD protection exceeds 3500 V HBM per JESD22-A114, 250 V DIP package, 400 V SO package MM per JESD22-A115, and 1000 V CDM per JESD22-C101
  • Latch-up free (bipolar process with no latching structures)
  • Packages offered: DIP8, SO8 and TSSOP8
  • Interface between I2C-buses operating at different logic levels (for example, 5 V and 3 V or 15 V)
  • Interface between I2C-bus and SMBus (350 µA) standard
  • Simple conversion of I2C-bus SDA or SCL signals to multi-drop differential bus hardware, for example, via compatible PCA82C250
  • Interfaces with opto-couplers to provide opto-isolation between I2C-bus nodes up to 400 kHz
  • Ambient operating temperature -40 °C (Min), 85 °C (Max)
  • Supply voltage 2 V (Min), 15 V (Max)

Part numbers include: P82B96DP, P82B96TD.


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