MSC8126: Quad Core 16-bit DSP with Ethernet, TCOP and VCOP ARCHIVED

Four 400/500 MHz StarCore^® SC140 DSP extended cores

• 16 ALUs on a chip deliver up to 6400/8000 MMACS
• Performance equivalent to a 1.6/2.0 GHz SC140 Core

• Industry's largest on-chip SRAM memory
  • 1436 KB of internal SRAM
  • Efficient multi-level memory hierarchy
• External bus configurable as:
  • 32-bit data system bus/64-bit direct slave interface (DSI).
  • 64-bit data system bus/32-bit DSI.
  • Ethernet (MII/RMII)/32-bit system bus/32-bit DSI.
• Four independent Time-Division Multiplex (TDM) Interfaces
  • 256 channels total for connectivity to T1/E1, MVIP, and H.110 interfaces
  • Up to 62.5 Mbps per TDM interface
• Flexible memory controller accesses various external memories, including SDRAMs, SRAMs, SSRAMs, EPROMs, and Flash
• Internal DMA controller that supports 16 time-multiplexed unidirectional channels, enabling data transfers of to and from the SC140 core M1 memory, the M2 memory, and the serial interfaces
• Ethernet interface designed to comply with IEEE®  Std 802.3^TM, 802.3u^TM, 802.3x^TM, and 802.3ac^TM:
  • Gives direct access to internal memories via the DMA controller
  • Supports the 10/100 Mbps and 10 Mbps media-independent interfaces (MIIs), 10/100 Mbps reduced media-independent interface (RMII), and 10/100 Mbps serial media-independent interface (SMII)
• Two internal coprocesssors (TCOP and VCOP) to provide special-purpose processing capability in parallel with the core processors
  • At 500 MHz, TCOP supports twenty turbo-coding 384 kbps channels.
  • At 500 MHz, VCOP supports 400 3GPP 12.2 kbps AMR channels and 200 blind transport format detection (BTFD) channels

The MSC8126 device is manufactured in 90 nm process technology. The device uses a 20 mm x 20 mm Flip Chip Ball-Grid Array (FC-BGA) package, available with lead-free or lead-bearing spheres.

Availability

Contact your local Sales office for information about availability.