Layerscape Access LA9350 | Baseband Processor

Overview

PREPRODUCTION

The Layerscape LA9350 is a programmable baseband processor for 5G-NR fixed wireless edge access and 3GPP infrastructure equipment. LA9350 also enables unprecedented flexibility with PHY/baseband processing for O-RAN functional split options, proprietary applications, and value added differentiation.

> 500 GFLOPs VSPA Vector Engine performance
Integrated high-speed analog/digital data converters with up to 424 MSPS ADC x4 and 848 MSPS DAC x4 throughput sub-6 GHz applications
2.5 Gbit/s SGMII
< 2.5 W

This page contains information on a preproduction product. Specifications and information herein are subject to change without notice.

For additional information and sample availability, contact your local NXP^® Sales Office

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Features

Signal Processing

3x VSPA-16 @ 625 MHz

Core and Memory complex

2x e200, 312 MHz
- 16K I-Cache, 16K D-Cache
- 64 K local SRAM
2 MB On-Chip SRAM
Security offload – 2 Gbit/s AES-256 encryption

Interface

Analog/digital data converters
- Up to 424 MSPS ADC x 4
  - Each pair of ADCs can be interleaved to achieve 848 MSPS
- Up to 848 MSPS DAC x 4
Timer outputs
SPI, I²C, GPIO, JTAG, UART

MoreLess

Features

Signal Processing

3x VSPA-16 @ 625 MHz

Core and Memory complex

2x e200, 312 MHz
- 16K I-Cache, 16K D-Cache
- 64 K local SRAM
2 MB On-Chip SRAM
Security offload – 2 Gbit/s AES-256 encryption

Interface

Analog/digital data converters
- Up to 424 MSPS ADC x 4
  - Each pair of ADCs can be interleaved to achieve 848 MSPS
- Up to 848 MSPS DAC x 4
Timer outputs
SPI, I²C, GPIO, JTAG, UART

Application Notes

Layerscape Access LA9350 Block Diagram

Layerscape Access LA9350 Block Diagram

Layerscape Access LA9350 Block Diagram

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