Dual Bidirectional I3C/I²C-Bus and SPI Voltage-Level Translator

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Block Diagram

P3A9606 Block Diagram

P3A9606 Block Diagram

Features

General Features

  • Wide supply voltage range:
    • VCC(A): 0.72 V to 1.98 V and VCC(B): 0.72 V to 1.98 V; VCC(A) ≤ VCC(B)
  • IOFF circuitry provides partial power-down mode operation
  • Inputs accept voltages up to 1.98 V and are overvoltage tolerant to 1.98 V
  • Provided voltage level translation for I3C, I²C-bus, SMBus and SPI devices
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
  • Latch-up performance exceeds 100 mA per JESD 78B class II
  • Available in X2SON8 1.35 x 1.0 x 0.32 mm package with 0.35 mm pitch

ESD Protection

  • HBM JESD22-A114E class 2 exceeds 2000 V
  • CDM JESD22-C101E exceeds 1000 V

Comparison Table

Part Number VCC(A) VCC(B) Signal
PCA9306 1 to 3.6 V 2 to 5.5 V I²C
NTB0104 1.2 to 3.6 V 1.65 to 5.5 V SPI
P3A9606 0.72 to 1.98 V 0.72 to 1.98 V I²C, SPI or I3C

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