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The StarCore SC3900FP flexible vector processor (FVP) is the industry’s highest performance next-generation communication DSP designed to address wireless infrastructure requirements for high-performance, low-power capabilities.

The high level of programmability of the SC3900FP core enables highly efficient and flexible implementation of the physical (PHY) layer of software-definable radio systems for existing and next-generation wireless standards of WCDMA, HSPA+, TD-SCDMA, WiMAX, LTE and LTE Advanced.

The SC3900FP FVP is designed for wireless infrastructure, specifically PHY layer baseband applications.


The SC3900FP supports an advanced multicore technology, enabling multiple cores to be connected together to form a cluster of cores. The SC3900FP multicore approach considerably reduces the SoC fabric traffic and enables efficient code and data sharing. In addition, a dedicated accelerator port enables a direct and efficient connection of hardware accelerators directly to the shared L2 cache of the cores.

Each cluster is connected to the SoC through our CoreNet high-performance cache coherent fabric, delivering single-core programming simplicity into a multicore system. Coherency is supported by hardware throughout all memory levels inside cores, the clusters and the whole device.

Performance at 1.2 GHz
  • Up to 38.4 GMACS
  • Up to 19.2 GFLOPS
  • Up to 1.2 Tb/s memory bandwidth
  • Multiple instruction, multiple data
  • Up to eight instructions per cycles
  • Up to eight data lanes vector in a single instruction (SIMD8)
High level programmability support
  • Up to 16 IEEE® single precision floating point operations per cycle
  • High performance for out-of-the box compiled DSP code
  • C, C++ and Embedded C support
High-performance memory system
  • High bandwidth and data streaming capabilities
  • Clustering two SC3900FP cores under a 2 MB shared L2 cache
  • Hardware support for memory coherency between L1, L2 caches and the main memory
Low power
  • Advanced low-power optimization methodology