Scalable, Entry-Level 32-bit Microcontrollers (MCUs)

LPC11XXLV

Product Details

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Features

System

  • Arm Cortex-M0 processor, running at frequencies of up to 50 MHz
  • Arm Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC)
  • Serial wire debug
  • System tick timer

Memory

  • Up to 32 KB on-chip flash programming memory with a 256 byte page erase function
  • Up to 8 KB SRAM
  • In-system programming (ISP) and in-application programming (IAP) via on-chip bootloader software

Digital peripherals

  • Up to 27 general purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors and a configurable open-drain mode
  • GPIO pins can be used as edge and level sensitive interrupt sources
  • High-current output driver on one pin
  • High-current sink drivers on two I2C-bus pins in fast-mode plus
  • Four general purpose counter/timers with a total of 7 capture inputs and 13 match outputs
  • Programmable windowed watch dog timer (WDT)

Analog peripherals

  • 8-bit ADC with input multiplexing among 8 pins

Serial interfaces

  • UART with fractional baud rate generation and internal FIFO
  • One SPI controllers with SSP features and with FIFO and multi-protocol capabilities
  • I²C-bus interface supporting full I²C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode

Clock generation

  • 12 MHz internal RC oscillator trimmed to 2.5 % accuracy for Tamb= -20 °C to +85 °C and to 5 % accuracy for Tamb = -40 °C to -20 °C. The IRC can optionally be used as a system clock
  • Crystal oscillator with an operating range of 1 MHz to 25 MHz
  • Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz
  • PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator
  • Clock output function with divider that can reflect the system oscillator clock, IRC, CPU clock, and the Watchdog clock

Power control

  • Two reduced power modes: Sleep and deep-sleep mode
  • Ultra-low power consumption in deep-sleep mode
  • Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 13 of the functional pins
  • Power-On Reset (POR)
  • Brownout Detection (BOD) causing a forced reset

Additional features

  • Device serial number for identification
  • Single power supply (1.65 V to 1.95 V)
  • Available as WLCSP25, HVQFN24, HQFN33

Design Resources

Documentation

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Design Files

4 design files

Hardware

5 hardware offerings

Software

2 software files

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

4 engineering services

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Training

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