The MPC564 is a high-speed 32-bit control unit that combines high-performance data manipulation capabilities with powerful peripheral subsystems. This MCU is built up from standard modules that interface through a common intermodule bus (IMB).

The MPC564 is equipped with code compression designed to reduce program size by up to 50 percent, allowing you to store larger programs in the on-board flash memory. Compressed code may also improve performance when using external memories.

Product Details

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Block Diagram

MPC564 Block Diagram

MPC564 Block Diagram
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Features

  • Precise exception model
  • Floating point
  • Extensive system development support
  • On-chip watchpoints and breakpoints
  • Background debug mode (BDM)
  • IEEE®-ISTO 5001-1999 NEXUS class 3 debug interface
  • True 5-volt I/O
  • Two time processing units (TPU3) with 8 KB DPTRAM
  • 22-channel MIOS timer (MIOS14)
  • Two queued analog-to-digital converter modules (QADC64_A, QADC64_B) providing a total of 32 analog channels
  • Three TouCAN modules (TOUCAN_A, TOUCAN_B, TOUCAN_C)
  • One queued serial module with one queued SPI and two SCIs (QSMCM) 32 KB static RAM (CALRAM)

Documentation

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Design Resources

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Design Files

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  • Printed Circuit Boards and Schematics

    MPC564 Evaluation Board Schematics for the MPC561/562/563/564/533/534

    PDFRev CApr 10, 20031.4 MBMPC564EVB
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Hardware

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Software

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