QorIQ® P1010 and P1014 Low-Power Communications Processors with Trust Architecture
Overview
Features
Features
Core Complex
- Single e500 core, built on Power Architecture® technology
- 32 KB of L1 instruction cache and 32 KB of L1 data cache
- 400 to 1000 MHz core clock frequency
- 256 KB L2 cache with ECC, also configurable as SRAM and stashing memory
Networking Elements
- SerDes
- 6 lanes at up to 3.125 GHz
- Supports SGMII, PCI Express® (PCIe) and SATA
Accelerators and Memory Control
- 16-/32-bit DDR3 SDRAM memory controller with ECC support
- Hardware-based cryptography acceleration (SEC4.0)
- Up to three Gigabit Ethernet interfaces with support for IEEE® 1588
- TCP/IP acceleration, quality of service and classification capabilities
- Support for RGMII and SGMII
Basic Peripherals and Interconnect
- 1 x USB controller (USB 2.0) with integrated PHY, OTG and device support
- 2x Serial ATA (SATA2.0) controllers
- Serial peripheral interface (SPI)
- Trusted boot platform, integrated security
- Four-channel DMA controller
- 2 x I²C controllers, 2 x DUARTs, timers
- Integrated flash controller (IFC) with enhanced capabilities to support large pages
- 2x PCIe controllers
- 2x FlexCAN interfaces to support industrial protocols
Additional Features
- Trusted boot platform
Development Boards and Designs
Development Boards and Designs
P1010RDB:QorIQ® P1010 Reference Design Board.
Target Applications
Automotive
Communication Infrastructure
Industrial
Comparison Table
| P1010 | P1014 | |
|---|---|---|
| Core Frequency | 533 to 1000 MHz | 400 to 800 MHz |
| L2 Cache | 256 KB | 256 KB |
| DDR3 | 16/32-bit @ 800 MHz | 16-bit @ 800 MHz |
| GE Ports | 3 | 2 |
| SATA | 2 | 2 |
| PCI Express | 2 | 2 |
| Security | Trusted | No |
| CAN | 2 | No |