2nd Generation CAN SIC Transceiver with Sleep Mode (ASIL B and 1.8 V VIO)

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Block Diagram

TJA1467

TJA1467 Block Diagram

Features

General Features

  • ISO 11898-2:2024, SAE J2284-1 to SAE J2284-5 and SAE J1939-14 compliant
  • CAN FD communication up to 8 Mbit/s
  • VIO input for interfacing with 1.8 V, 3.3 V and 5 V microcontrollers (compatible with TJA1462A)
  • Low electromagnetic emission (EME) and high electromagnetic immunity (EMI)
  • Qualified according to AEC-Q100 grade 1
  • Available in SO14 package and leadless HVSON14 package

Signal Improvement and CAN XL Ready

  • Implements CAN SIC as defined in ISO 11898-2:2024 third edition to significantly reduce signal ringing effects on a network
  • Tighter bit timing symmetry performance allowing more times to reduce signal ringing
  • Max wake-up-pattern time shortened to 1.45 us
  • Extended bus load range (45 Ω - 65 Ω) to cover both CAN SIC and CAN XL fast mode

Fail-Safe and Functional Safety

  • ASIL B rated according ISO 26262, providing all required functional safety documentation, such as safety manual, FMEDA, etc.
  • Undervoltage detection with defined handling on all supply pins
  • Full functionality guaranteed from the undervoltage detection thresholds up to the maximum limiting voltage values
  • Defined behavior below the undervoltage detection thresholds
  • Transceiver disengages from the bus (high-ohmic) when the supply voltage drops below the off-mode threshold
  • Internal biasing of TXD and mode selection input pins to enable defined fail-safe behavior

Documentation

Quick reference to our documentation types

1 documents

Compact List

Design Resources

Hardware

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1 hardware offering

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