Type-C USB 3.2 and DisplayPort v 1.4 Combination Linear Redriver

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Block Diagram

PTN38003A

PTN38003A Block Diagram

Features

Key Features

  • Maximum Peaking gain: ~12 dB @ 5 GHz; ~10 dB @ 4.05 GHz
  • Supports DP AUX snoop function for automatic lane count, power down mode setting and output signal swing linearity and equalization gain control
  • Low power design with very low power saving modes
  • Single Power Supply: VDD=1.8 V±5%
  • Supports up to 4 I²C peripheral addresses
  • Low propagation delay: 90 ps (max)
  • ESD HBM 1.5 kV
  • Small thin package: HWFLGA 36 (2.1 x 6.0 x 0.6 mm), 0.4mm pitch

Combination USB and DisplayPort Linear Redriver

  • Supports 4 input 4 output operation in following modes
  • USB 3.2 Gen 1x1, Gen 1x2, Gen 2x1, Gen 2x2 (5 Gbps and 10 Gbps per lane)
  • DP 1.4 4-lane (1.62 / 2.7 / 5.4 / 8.1 Gbps per lane)
  • USB 3.2 + DP 1.4 2 lane

Excellent Signal and Power Integrity

  • DDNEXT <-50 dB @ 10 GHz; DDRL <-15 dB @ 10 GHz
  • CMRR: <-30 dB @1 GHz; PSRR: <-41 dB @ 200 MHz

Low Power Consumption

  • 4 Active channel: 450 mW
  • USB U2/U3 power saving mode: 0.4 mW
  • DisplayPort D3 power saving mode: 5.7 mW

Part numbers include: PTN38003AEW.

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Documentation

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Design Files

Hardware

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