Maximum frequency operation of the MPC8xx core is 100 MHz
- Maximum frequency operation of the external bus is 66 MHz in 1:1 mode
- Single-issue, 32-bit core (compatible with Power Architecture technology)
with 32, 32-bit general-purpose registers (GPRs)
- Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
- 32 address lines
- Memory controller (eight banks)
- General-purpose timers
- System integration unit (SIU)
- Interrupts
- Communications processor module (CPM)
- Two baud rate generators
- Two SCCs (serial communication controllers) (10BaseT Ethernet, HDLC, Transparent)
- One SMC (serial management channel)
- One SPI (serial peripheral interface)
- Fast Ethernet controller (FEC)
- PCMCIA interface
- Debug interface
- 1.8 V Core and 3.3 V I/O operation with 5-V TTL compatibility
- 256-pin, 23*23 1.27 ball pitch (BGA) package