Radar Microcontroller

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Block Diagram

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S32R294 Radar MCU

S32R294 Block Diagram

S32R29x Application

S32R29x Applications Block Diagram


High Performance Safe Compute

  • Dual Power Architecture® e200z7 32-bit CPU up to 500 MHz
  • Dedicated safety processing with Power Architecture® e200z4 cores in lockstep up to 250 MHz

Radar Processing Acceleration

  • SPT 2.8 up to 430 MHz for optimized radar signal processing
  • Cross Timing Engine (CTE) for precise timing generation and triggering

Integrates with NXP Radar MMIC’s

  • Up to 2x MIPI CSI2 for advanced corner and front radar applications with NXP TEF82xx

Memory Capacity for Demanding Radar Applications

  • Up to 5.5 MB SRAM with ECC
  • QuadSPI DDR up to 80 MHz

Enhanced Security for Automotive Applications

  • Cryptographic services engine (CSE3) with secure boot and advanced security algorithms

Designed with Safety in Mind

  • ISO26262 SEooC ASIL B(D)

Connected and Scalable

  • 1 x Gb Ethernet 10/100 Mbit/s
  • 3 x flexCAN with FD
  • 1 x Dual-channel flexRay

Full Grade1 Temperature Range Operation

  • -40 ºC to 150 °C (Tj) AEC-Q100 grade-1

Comparison Table

Product Program

Safe Assure®

When it comes to functional safety, NXP stands for quality and reliability. Our SafeAssure program simplifies system-level safety requirements in accordance with ISO 26262.


Quick reference to our documentation types.

Design Resources


4 hardware offerings


3 software files

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

2 engineering services

To find a complete list of our partners that support this product, please see our Partner Marketplace.


5 trainings


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