Dual 5-Bit Multiplexed 1-Bit Latched I²C EEPROM DIP Switch

Product Details

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Block Diagram

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PCA9560 Block Diagram

 PCA9560 Block Diagram

Block diagram: PCA9555BS, PCA9555D, PCA9555DB, PCA9555HF, PCA9555N, PCA9555PW

Features

  • 5-bit 3-to-1 multiplexer, 1-bit latch DIP switch
  • 5-bit external hardware pins
  • Two 6-bit internal non-volatile registers, fully pin-to-pin compatible with PCA9559
  • Selection between the two non-volatile registers
  • Selection between non-volatile registers and external hardware pins
  • I²C/SMBus interface logic
  • Internal pull-up resistors on input pin and control signals
  • Active high write protect on input controls the ability to write to the non-volatile registers
  • 2 address pins, allowing up to 4 devices on the I²C-bus
  • 5 open drain multiplexed outputs
  • Open drain non-multiplexed output
  • Internal 6-bit non-volatile registers programmable and readable via I²C-bus
  • External hardware 5-bit value readable via I²C-bus
  • Multiplexer selection can be overridden by I²C-bus
  • Operating power supply voltage 3.0 V to 3.6 V
  • 5 V and 2.5 V tolerant inputs/outputs
  • 0 to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA.
  • Package offering: SO20, TSSOP20

Documentation

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Design Resources

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Hardware

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