24-bit Dual-Core Symphony® DSP

  • This page contains information on a product that is not recommended for new designs.

Block Diagram

2243_DSP56724_5_BD

 2243_DSP56724_5_BD

Features

  • Dual DSP56300 cores for high performance—250 MHz per core for 500 MIPS performance at a consumer temperature range
  • 112K x 24-bit words RAM
  • Asynchronous sample rate converter (ASRC) to allow multiple data rates in a system
  • Integrated S/PDIF transceiver to reduce system cost and complexity
  • External memory controller (EMC) provides for memory expansion to cost-effective SDRAM and flexibility in system design by providing memory expansion for one or both cores
  • Enhanced serial audio interface (ESAI)—four modules to allow multiple sources
  • Dual serial host interfaces (SHI) that support SPI or I²C protocols which provide high-speed communication between the DSP and other integrated circuits in the system
  • Dual triple timer modules for a flexible, programmable timer system
  • Dual hardware watchdog timers (WDT) allow for recovery from runaway code
  • 144LQFP package
  • This product is included in NXP®.s product longevity program, with assured supply for a minimum of 10 years after launch

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Documentation

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1-5 of 8 documents

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Design Files

Hardware

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5 hardware offerings

Software

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2 software files

Note: For better experience, software downloads are recommended on desktop.

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