S12ZVL Mixed-Signal MCU for Automotive and Industrial LIN Applications

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Block Diagram

S12 MagniV Mixed-Signal MCU for LIN Applications Block Diagram

S12 MagniV Mixed-Signal MCU for LIN Applications

Features

  • S12Z core - 32 MHz bus speed
  • Up to 128 KB Flash (with ECC)
  • High temperature (up to 150º C ambient)
  • Up to 2KB EEPROM (with ECC)
  • Up to 8 KB RAM (with ECC)
  • Analog comparator and DAC
  • PGA
  • 12V Vreg to supply device + ext comp- 70mA total (170mA with ext. Ballast)
  • LIN physical layer
  • On-chip RC-oscillator trimmed to 1.3% accuracy, no ext xtal required on LIN

SafeAssure Program

SafeAssure Functional Safety Program

When it comes to functional safety, NXP stands for quality and reliability. Our SafeAssure program simplifies system-level safety requirements in accordance with ISO 26262.
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S12ZVL Family Comparison

    48-LQFP
    S12ZVLA S12ZVL S12ZVL
Memory Flash [kB] 128 96 64 128 96 64 32 16 8
EEPROM [kB] 2 1 2 1 0.128
RAM [kB] 8 4 8 4 1 0.5
UHV V reg 5V / 3.3V ; 70mA or up to 170
(with ballast option / BCTL)
5V; 70mA or up to 170
(with ballast option / BCTL)
V reg tolerance 2% 3% 3%
PHY LIN
HVI 1
Analog ADC (LB) channel 10
ADC (LB) resolution 12 Bit 10 Bit 10 Bit
ACMP with 8bit DAC 1 - -
PGA 1 - -
PGA levels 10/20/40/80x - -
Comms SCI 2
SPI 1
IIC 1
MSCAN 1 -
Tim Timer (6+2ch) 6ch + 2ch (16 Bit)
PWM   8ch 8Bit (or 4ch 16Bit)
I/O GPIO 35 -
intrr. Cap. IO (5/12v) 22/1  
eVdd (5V/20mA) 1
N-GPIOs (5V / 25mA) 3 1
  Temperature options C / V / M C / V / M


    32-LQFP 32-QFN 32-LQFP 32-QFN
    S12ZVLA S12ZVL S12ZVLA S12ZVL S12ZVLS
Memory Flash [kB] 128 96 64 128 96 64 128 96 64 32 16 8 32 16
EEPROM [kB] 2 1 2 1 2 1 0.128
RAM [kB] 8 4 8 4 8 4 1 0.5 1
UHV V reg 5V / 3.3V ; 70mA or up to 170
(with ballast option / BCTL)
5V; 70mA or up to 170
(with ballast option / BCTL)
V reg tolerance 2% 3% 2% 3%
PHY LIN
HVI 1
Analog ADC (LB) channel 6 7 6
ADC (LB) resolution 12 Bit 10 Bit 12 Bit 10 Bit
ACMP with 8bit DAC 1 0 1 -
PGA 1 - 1 -
PGA levels 10/20/40/80x - 10/20/40/80x -
Comms SCI 2
SPI 1
IIC 1
MSCAN 1 -
Tim Timer (6+2ch on silicon) 6ch + 2ch (16 Bit)
PWM   8ch (16Bit) 8ch 8Bit (or 4ch 16Bit)
I/O GPIO 20  
intrr. Cap. IO (5/12v) 16/1  
eVdd (5V/20mA) 1
N-GPIOs (5V / 25mA) 1 1 3
  Temperature options C / V / M C / V / M

Documentation

Quick reference to our documentation types.

1-5 of 26 documents

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Design Resources

Design Files

4 design files

  • Symbols and Footprints

    S12ZVL_48LQFP - CAD Symbol and PCB Footprint - BXL File

  • Symbols and Footprints

    S12ZVL_32QFN_EP - CAD Symbol and PCB Footprint - BXL File

  • Symbols and Footprints

    S12ZVL_48LQFP - CAD Symbol and PCB Footprint - BXL File

  • Symbols and Footprints

    S12ZVL_64LQFP_EP - CAD Symbol and PCB Footprint - BXL File

Hardware

1-5 of 9 hardware offerings

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Software

1-5 of 8 software files

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Note: For better experience, software downloads are recommended on desktop.

Engineering Services

3 engineering services

To find a complete list of our partners that support this product, please see our Partner Marketplace.

Training

4 trainings