MCF540X: Integrated ColdFire^® V4 Microprocessor

Overview

The MCF5407 is the first standard microprocessor to implement the ColdFire^® V4 core. Increasing the internal speed of the core allows higher performance and provides system designers with an easy-to-use lower speed system interface.

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Features

ColdFire^® V4 core-delivering up to 316 (Dhrystone 2.1) MIPS @ 220 MHz
Harvard memory architecture and branch cache acceleration logic
Fully code compatible with V2 and V3 ColdFire cores
16 KB instruction-cache, 8 KB data-cache
4 KB SRAM
Multiply-accumulate (MAC) with integer and fractional capabilities
Hardware integer divide unit
Integrated pheripherals
- DRAM controller: glueless interface to SDRAM or ADRAM
- Two universal asynchronous receiver/transmitter (UARTS), one that supports synchronous operations
- Four fully programmable direct memory access (DMA) channels
- Two 16-bit general-purpose timers
- I²C module
- Parallel I/O interface
- System integration module(SIM)
Pin-compatible with MCF5307

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Features

ColdFire^® V4 core-delivering up to 316 (Dhrystone 2.1) MIPS @ 220 MHz
Harvard memory architecture and branch cache acceleration logic
Fully code compatible with V2 and V3 ColdFire cores
16 KB instruction-cache, 8 KB data-cache
4 KB SRAM
Multiply-accumulate (MAC) with integer and fractional capabilities
Hardware integer divide unit
Integrated pheripherals
- DRAM controller: glueless interface to SDRAM or ADRAM
- Two universal asynchronous receiver/transmitter (UARTS), one that supports synchronous operations
- Four fully programmable direct memory access (DMA) channels
- Two 16-bit general-purpose timers
- I²C module
- Parallel I/O interface
- System integration module(SIM)
Pin-compatible with MCF5307