PowerQUICC® Processor with CPM (1 SCC, 1 SMC), 10/100 Ethernet

Overview

The MPC859DSL Integrated Communications Controller is a versatile one-chip integrated microprocesor and peripheral combination that can be used in a variety of controller applications. It particularly excels in CPE applications including DSL modems, IADs, and residential gateways. Like the MPC866, the MPC859DSL is a 0.18 micron version of the PowerQUICC^® Family and can operate up to 66 MHz on the MPC8xx core. It has a 1.8 V core and a 3.3 V I/O operation.

The MPC859DSL is a Power Architecture-based derivative of NXP^® Semiconductors's Quad Integrated Communications Controller (PowerQUICC). The embedded CPU on the MPC859DSL is the MPC8xx core, a 32-bit microprocessor built on Power Architecture technology, incorporating memory management units (MMUs) and instruction and data caches. The memory controller supports many memory types, including SDRAM. The CPM (Communications Processing Module) is optimized for CPE applications supporting simultaneous operation of Fast Ethernet (MII) and parallel ATM (UTOPIA), UTOPIA II Multi-PHY (up to 4 addresses), and many more features.

Features

Embedded MPC8xx core

Single-issue, 32-bit version of the core (compatible with Power Architecture technology) with 32, 32-bit general-purpose registers (GPRs)
The MPC859DSL provides enhanced ATM functionality over that of the MPC860SAR. The MPC859DSL adds major new features available in "enhanced SAR" (ESAR) mode, including the following:
- Multiple APC priority levels available to support a range of traffic pace requirements
- Port-to-port switching capability without the need for RAM-based microcode
- Simultaneous MII (100Base-T) and UTOPIA (half-duplex) capability
- Parameter RAM for both SPI and I²C can be relocated without RAM-based microcode
- Supports full-duplex UTOPIA leader (ATM side) operation using a "split" bus
Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
UTOPIA port supports up to 4 PHY addresses
Complete static design
Memory controller (eight banks)
General-purpose timers
Fast Ethernet controller (FEC)
System integration unit (SIU)
Interrupts
Communications processor module (CPM)
Four baud rate generators
One SCC (serial communication controller) for Ethernet (SCC1)
One SMC (serial management channel) for UART (SMC1)
One SPI (serial peripheral interface)
One I²C (inter-integrated circuit) port
Parallel interface port (PIP)
One PCMCIA socket (Port B)
Low power support
Debug interface
1.8 V core, 3.3 V I/O
357-pin PBGA package

The MPC859DSL is rated as a commercial quality product. Please contact your NXP^® Field Sales Representative or the NXP factory for more details.

Features

Embedded MPC8xx core

Single-issue, 32-bit version of the core (compatible with Power Architecture technology) with 32, 32-bit general-purpose registers (GPRs)
The MPC859DSL provides enhanced ATM functionality over that of the MPC860SAR. The MPC859DSL adds major new features available in "enhanced SAR" (ESAR) mode, including the following:
- Multiple APC priority levels available to support a range of traffic pace requirements
- Port-to-port switching capability without the need for RAM-based microcode
- Simultaneous MII (100Base-T) and UTOPIA (half-duplex) capability
- Parameter RAM for both SPI and I²C can be relocated without RAM-based microcode
- Supports full-duplex UTOPIA leader (ATM side) operation using a "split" bus
Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits)
UTOPIA port supports up to 4 PHY addresses
Complete static design
Memory controller (eight banks)
General-purpose timers
Fast Ethernet controller (FEC)
System integration unit (SIU)
Interrupts
Communications processor module (CPM)
Four baud rate generators
One SCC (serial communication controller) for Ethernet (SCC1)
One SMC (serial management channel) for UART (SMC1)
One SPI (serial peripheral interface)
One I²C (inter-integrated circuit) port
Parallel interface port (PIP)
One PCMCIA socket (Port B)
Low power support
Debug interface
1.8 V core, 3.3 V I/O
357-pin PBGA package

The MPC859DSL is rated as a commercial quality product. Please contact your NXP^® Field Sales Representative or the NXP factory for more details.

MPC866ADS_KIT:MPC866 Application Development System Kit

Evaluation and Development Boards

	Qual	Process	Mask	IMMR [16:31]
Rev 0.3	MC	HiP6W	3L90H	0x0800
Rev A.0	MC	HiP6W	0L96R	0x0801

Qual

Process

Mask

IMMR [16:31]

Rev 0.3

HiP6W

3L90H

0x0800

Rev A.0

HiP6W

0L96R

0x0801

Complementary products for your application

MPC859DSL: PowerQUICC^® Processor with CPM (1 SCC, 1 SMC), 10/100 Ethernet

Overview

Features

Features

Development Boards and Designs

Development Boards and Designs

Target Applications

Automotive

Communication Infrastructure

Industrial

Smart City

Comparison Table

MPC866 Family Versions and Masks

Complementary products for your application

MPC859DSL: PowerQUICC® Processor with CPM (1 SCC, 1 SMC), 10/100 Ethernet

Overview

Features

Features

Development Boards and Designs

Development Boards and Designs

Target Applications

Automotive

Communication Infrastructure

Industrial

Smart City

Comparison Table

MPC866 Family Versions and Masks

Complementary products for your application

MPC859DSL: PowerQUICC^® Processor with CPM (1 SCC, 1 SMC), 10/100 Ethernet