Application Note (34)
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Porting Linux® to the MPC8260ADS[AN2579]
The MPC8260 PowerQUICC® II™ is an advanced integrated communications processor designed for the telecommunications and networking markets.
The MPC8260 now offers floating point support.
The MPC8260 PowerQUICC II can best be described as the next generation MPC860 PowerQUICC®, providing higher performance in all areas of device operation, including greater flexibility, extended capabilities, and higher integration.
Like the MPC860, the MPC8260 integrates two main components, the embedded G2 core and the Communications Processor Module (CPM). This dual-processor architecture consumes less power than traditional architectures because the CPM offloads peripheral tasks from the embedded G2 core. The CPM simultaneously supports three fast serial communications controllers (FCCs), two multichannel controllers (MCCs), four serial communications controllers (SCCs), two serial management controllers (SMCs), one serial peripheral interface (SPI) and one I²C interface. The combination of the G2 core and the CPM, along with the versatility and performance of the MPC8260, provides customers with enormous potential in developing networking and communications products while significantly reducing time-to-market development stages.

| 8250 | 8255 | 8260 | 8264 | 8265 | 8266 | |
|---|---|---|---|---|---|---|
| IMA Functionality | - | - | - | Yes | - | Yes |
| UTOPIA II Ports | 0 | 2 | 2 | 2 | 2 | 2 |
| PCI Interface | Yes | - | - | - | Yes | yes |
| Multi-Channel HDLC | Up to 128 | Up to 128 | Up to 256 | Up to 256 | Up to 256 | Up to 256 |
| I-Cache (Kbyte) | 16 | 16 | 16 | 16 | 16 | 16 |
| Fast Communication Controllers (FCCs) | 3 | 2 | 3 | 3 | 3 | 3 |
| Serial Communications Controllers (SCCs) | 4 | 4 | 4 | 4 | 4 | 4 |
| D-Cache (Kbyte) | 16 | 16 | 16 | 16 | 16 | 16 |
| Ethernet (10/100) | Up to 3 | Up to 2 | Up to 3 | Up to 3 | Up to 3 | Up to 3 |
| Ethernet (10T) | Up to 4 | Up to 4 | Up to 4 | Up to 4 | Up to 4 | Up to 4 |
| IMMR_ [16-31]¹ | Rev_Num² | Qualification | Revision | Process | Mask | |
|---|---|---|---|---|---|---|
| MPC8260 Family | XC | A.1 B.3 C.2 |
0.29 µm (HiP3) |
0K26N 3K23A 6K23A, 7K23A |
||
| MPC8260 Family | XC MC MC |
A.0 B.1 C.0 |
0.25 µm (HiP4) |
2K25A 4K25A 5K25A |
||
| MPC8280 Family | - MC MC |
0 0.1 A.0 |
0.13 µm (HiP7) |
0K49M 1K49M 2K49M, 3K49M |
||
| MPC8272 Family | PC MC |
0 A.0 |
0.13 µm (HiP7) |
0K50M 1K50M |
Notes:
1. The IMMR[16-31] indicates the mask number.
2. The Rev_Num located at offset 0x8AF0 in DPRAM indicates the CPM microcode revision number.
3 . Encryption Enabled.
4 . Encryption Disabled.
Masks and versions table last updated on 14OCT2004.
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