ISO17987 LIN 2.1/SAE J2602 Transceiver

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Block Diagram

TJA1021 Block Diagram

TJA1021 Block Diagram



  • LIN 2.1/SAE J2602 compliant
  • Baud rate up to 20 kBd
  • Very low ElectroMagnetic Emission (EME)
  • High ElectroMagnetic Immunity (EMI)
  • Passive behavior in unpowered state
  • Input levels compatible with 3.3 V and 5 V devices
  • Integrated termination resistor for LIN follower applications
  • Wake-up source recognition (local or remote)
  • K-line compatible
  • Pin-to-pin compatible with TJA1020
  • Available in SO8 and HVSON8 packages
  • Leadless HVSON8 package (3.0 mm × 3.0 mm) with improved Automated Optical Inspection (AOI) capability

Low Power Management

  • Very low current consumption in Sleep mode with local and remote wake-up

Protection Mechanisms

  • High ESD robustness: ±6 kV according to IEC 61000-4-2 for pins LIN, VBAT and WAKE_N
  • Transmit data (TXD) dominant time-out function
  • Bus terminal and battery pin protected against transients in the automotive environment (ISO 7637)
  • Bus terminal short-circuit proof to battery and ground
  • Thermally protected

Product Longevity Program

  • These products are included in the NXP Product Longevity program ensuring a stable supply of products for your embedded designs. The TJA1021A and TJA1021B are included in the 15-year program


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