i.MX RT500 | Crossover MCU with ARM Cortex-M33, 5 MB SRAM

Overview

Limited Availability

i.MX RT500 crossover MCUs are part of the EdgeVerse™ edge computing platform and are optimized for low-power HMI application by combining a graphics engine and a streamlined Cadence^® Tensilica^® Fusion F1 DSP core with a next-generation Arm^® Cortex^®-M33 core. These devices are designed to unlock the potential of display-based applications with a secure, power-optimized embedded processor.

i.MX RT500 MCUs are part of the EdgeLock Assurance program, offering on-chip security capabilities and built on a foundation of secure boot, secure debug and secure life cycle management designed to resist remote and software local attacks.

Features

Cortex-M33 Core Running at a Frequency of up to 200 MHz

Arm TrustZone^® for asset protection
Cortex-M33 built-in Memory Protection Unit (MPU) supporting eight regions
Two coprocessors for the Cortex-M33
- PowerQuad hardware accelerator for (fixed and floating point unit) DSP functions
- CASPER crypto coprocessor to enable hardware acceleration for various functions required for certain asymmetric cryptographic algorithms

Highly Optimized Cadence^® Tensilica^® Fusion F1 DSP Processor Core Running at Frequencies of up to 200 MHz

Hardware Floating Point Unit; single-precision IEEE floating point MAC per cycle

On-Chip Memory

Up to 5 MB of system SRAM accessible by both CPUs and all DMA engines
2 x 32 kB FlexSPI cache

Security Features

Secure Isolation: Secure execution environment through Arm^® TrustZone^® technology for ARMv8-M, Symmetric key isolation through hardware engines
Secure Boot supports implemented in boot ROM, providing immutable root of trust
Secure Storage: Physically Unclonable Function (PUF) based key store, On-the-fly-AES decryption (OTFAD) of off-chip flash for code storage
Secure Debug: Certificate-based debug authentication mechanism
Secure Update supports firmware update with authenticity (RSA signed) and confidentiality (AES-CTR encrypted) protection
Hardware Cryptography Accelerators:
- Symmetric cryptography (AES) with 256-bit key strength
- Asymmetric cryptography acceleration
- TRNG with 256-bit entropy
- Hash engine with SHA-256 and SHA-1
Secure Identity: 128-bit Universal Unique Identifier (UUID) and 256-bit Compound Device Identifier (CDI)
A member of the EdgeLock Assurance program, providing on-chip security capabilities.

Digital Peripherals

Two DMA engines, each with 32 channels
Quad/Octal SPI Flash with a dynamic description
Two SD/eMMC memory card interfaces. One supports eMMC 5.0 with HS400/DDR operation
USB high-speed host/device controller with on-chip PHY
Up to 12 configurable universal serial interface modules (FlexComm interfaces) configurable as SPI/I2C/I2S/UART
One high-speed SPI interface supporting 50 MHz operation
Two I3C bus interfaces
A digital microphone interface supporting up to 8 channels

Features

Cortex-M33 Core Running at a Frequency of up to 200 MHz

Arm TrustZone^® for asset protection
Cortex-M33 built-in Memory Protection Unit (MPU) supporting eight regions
Two coprocessors for the Cortex-M33
- PowerQuad hardware accelerator for (fixed and floating point unit) DSP functions
- CASPER crypto coprocessor to enable hardware acceleration for various functions required for certain asymmetric cryptographic algorithms

Highly Optimized Cadence^® Tensilica^® Fusion F1 DSP Processor Core Running at Frequencies of up to 200 MHz

Hardware Floating Point Unit; single-precision IEEE floating point MAC per cycle

On-Chip Memory

Up to 5 MB of system SRAM accessible by both CPUs and all DMA engines
2 x 32 kB FlexSPI cache

Security Features

Secure Isolation: Secure execution environment through Arm^® TrustZone^® technology for ARMv8-M, Symmetric key isolation through hardware engines
Secure Boot supports implemented in boot ROM, providing immutable root of trust
Secure Storage: Physically Unclonable Function (PUF) based key store, On-the-fly-AES decryption (OTFAD) of off-chip flash for code storage
Secure Debug: Certificate-based debug authentication mechanism
Secure Update supports firmware update with authenticity (RSA signed) and confidentiality (AES-CTR encrypted) protection
Hardware Cryptography Accelerators:
- Symmetric cryptography (AES) with 256-bit key strength
- Asymmetric cryptography acceleration
- TRNG with 256-bit entropy
- Hash engine with SHA-256 and SHA-1
Secure Identity: 128-bit Universal Unique Identifier (UUID) and 256-bit Compound Device Identifier (CDI)
A member of the EdgeLock Assurance program, providing on-chip security capabilities.

Digital Peripherals

Two DMA engines, each with 32 channels
Quad/Octal SPI Flash with a dynamic description
Two SD/eMMC memory card interfaces. One supports eMMC 5.0 with HS400/DDR operation
USB high-speed host/device controller with on-chip PHY
Up to 12 configurable universal serial interface modules (FlexComm interfaces) configurable as SPI/I2C/I2S/UART
One high-speed SPI interface supporting 50 MHz operation
Two I3C bus interfaces
A digital microphone interface supporting up to 8 channels

MIMXRT595-EVK:i.MX RT595 Evaluation Kit

Evaluation and Development Boards

i.MX RT500 Crossover MCU with Arm^® Cortex^®-M33 Core

Overview

Features

Cortex-M33 Core Running at a Frequency of up to 200 MHz

Highly Optimized Cadence^® Tensilica^® Fusion F1 DSP Processor Core Running at Frequencies of up to 200 MHz

On-Chip Memory

Security Features

Digital Peripherals

Features

Cortex-M33 Core Running at a Frequency of up to 200 MHz

Highly Optimized Cadence^® Tensilica^® Fusion F1 DSP Processor Core Running at Frequencies of up to 200 MHz

On-Chip Memory

Security Features

Digital Peripherals

EdgeLock Assurance: The Mark of Security by Design

EdgeLock Assurance: The Mark of Security by Design

Development Boards and Designs

Development Boards and Designs

Target Applications

Industrial

Mobile

Smart Home

Technologies

EdgeLock^™ Assurance

i.MX RT500 Crossover MCU with Arm® Cortex®-M33 Core

Overview

Features

EdgeLock Assurance: The Mark of Security by Design

EdgeLock Assurance: The Mark of Security by Design

Development Boards and Designs

Development Boards and Designs

Target Applications

Industrial

Mobile

Smart Home

Technologies

EdgeLock™ Assurance

i.MX RT500 Crossover MCU with Arm^® Cortex^®-M33 Core

EdgeLock^™ Assurance