32-bit MCU for Body Electronics Applications

Block Diagram

MPC5510 Block Diagram

MPC5510 Block Diagram

Features

  • Power Architecture e200z1 core with variable length encoding (VLE)
  • Optional VLE-only 32/16-bit e200z0 secondary core
  • 16-channel eDMA (enhanced direct memory access)
  • Memory management unit (MMU) with 4-entry translation look-aside buffer (TLB)
  • Multiple low-power modes
  • JTAG and Nexus class 2+ debug support
  • Up to 1.5 MB of flash with error correction coding (ECC)
  • The flash module features read while write (RWW) and small partitions for optimal bootloader and EEPROM emulation support
  • Up to 80 KB of SRAM with ECC
  • Memory protection unit (MPU) with up to 16 regions and 32B granularity
  • This product is included in NXP®.s product longevity program, with assured supply for a minimum of 15 years after launch

Part numbers include: GPC5516EAMLQ48, MPC5517GAVMG80, SPC5514EAMLQ66, SPC5514EBMLQ66, SPC5514EBVLQ66, SPC5515SBMLQ66, SPC5515SBVLQ48, SPC5516EACMG48, SPC5516EAVLQ66, SPC5516EAVMG80, SPC5516EBMLQ66, SPC5517EAMLU66, SPC5517EAVLQ66, SPC5517EAVLU66, SPC5517EAVMG80, SPC5517EBCLQ66, SPC5517EBMLQ66, SPC5517EBVLQ66, SPC5517GAMLQ66, SPC5517SAMLU66, SPC5517SBMLQ66.

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Documentation

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1-5 of 53 documents

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Design Files

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2 design files

Hardware

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1-5 of 7 hardware offerings

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Software

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4 software files

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

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To find additional partner offerings that support this product, visit our Partner Marketplace.

Training

5 trainings