32-bit MCU for Automotive ADAS Applications

MPC5561
Archived
  • This page contains information on a product that is no longer manufactured (discontinued). Specifications and information herein are available for historical reference only.

The NXP® MPC5561 MCU delivers an exceptional combination of high-performance computation and signal processing capabilities for advanced driver assistance systems using radar or image sensors.

  • Ensures reliable high-speed communication
  • Includes integrated DSP features and upgraded interrupt control
  • Integrates more functionality on-chip for greater cost effectiveness
  • Supports multiple protocols and customer requirements through intelligent subsystems
  • Software and pin compatibility enables the reuse of legacy architectures to protect investments
  • Comprehensive development tools simplify and accelerate time-to-market

Product Details

Block Diagram

MPC5561 Microcontroller Block Diagram

MPC5561 Microcontroller Block Diagram
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Features

Our e200z6 Core

  • High-performance 132 MHz 32-bit core with variable length encoding (VLE) built on Power Architecture technology
  • Single instruction multiple data (SIMD) module for DSP and floating point capabilities

Memory

  • 1 MB of embedded flash memory with error correction coding (ECC) and read while write (RWW) capability
  • Flash: Up to 3 MB
  • 32 kB of cache (with line-locking) that can be configured as additional RAM

System

  • High-speed sensor interface
  • Integrated FlexRay controller
  • Crossbar architecture for efficient data flow
  • 32-channel enhanced direct memory access controller with advance scatter/gather
  • Interrupt controller capable of handling 281 selectable-priority interrupt sources
  • Frequency modulated phase-locked loop to assist in electromagnetic interference management
  • Nexus IEEE®-ISTO 5001 class 3+ multicore debug capabilities
  • 5/3.3 V IO, 5 V ADC, 3.3 V/1.8 V bus, 1.5 V core
  • 324-pin plastic ball grid array (PBGA) package
  • Temperature range: -40 ºC to +125 ºC

I/O

  • 20-channel dual enhanced queued analog-to-digital converter—up to 12-bit resolution and up to 1.25 ms conversions, six queues with triggering and DMA support
  • Two deserial serial peripheral interface (DSPI) modules—16 bits wide and up to six chip selects each
  • Two FlexCAN modules compatible with TouCAN
  • Four enhanced serial communication interface (eSCI) modules
  • 24-channel enhanced multiple I/O system with unified channels

Documentation

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Compact List

Application Note (25)

Design Resources

Design Files

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3 design files

Software

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