High-Speed CAN Transceiver with Standby and Sleep Mode

Block Diagram

TJA1043 Block Diagram

TJA1043 Block Diagram


General Features

  • Fully ISO 11898-2:2003, ISO 11898-5:2007 compliant
  • Loop delay symmetry timing enables reliable communication at data rates up to 5 Mbit/s in the CAN FD fast phase
  • Suitable for 12 V and 24 V systems
  • Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
  • VIO input allows for direct interfacing with 3 V and 5 V microcontrollers
  • SPLIT voltage output for stabilizing the recessive bus level
  • Listen-only mode for node diagnosis and failure containment
  • Available in SO14 and HVSON14 packages
  • Leadless HVSON14 package (3.0 mm × 4.5 mm) with improved Automated Optical Inspection (AOI) capability
  • AEC-Q100 qualified
  • Dark green product (halogen free and Restriction of Hazardous Substances (RoHS) compliant)

Low-power management

  • Very low current Standby and Sleep modes, with local and remote wake-up
  • Capability to power down the entire node while supporting local, remote and host wake-up
  • Wake-up source recognition
  • Transceiver disengages from the bus (zero load) when VBAT absent
  • Functional behavior predictable under all supply conditions

Protection and diagnosis (detection and signalling)

  • High ESD handling capability on the bus pins
  • Bus pins and VBAT protected against transients in automotive environments
  • Transmit Data (TXD) dominant time-out function with diagnosis
  • TXD-to-RXD short-circuit handler with diagnosis
  • Thermal protection with diagnosis
  • Under-voltage detection and recovery on pins VCC, VIO and VBAT
  • Bus line short-circuit diagnosis
  • Bus dominant clamping diagnosis
  • Cold start diagnosis (first battery connection)

Product Longevity Program

  • This product is included in the NXP Product Longevity Program ensuring a stable supply of products for your embedded designs. The TJA1043 is included in the 15-year program.

Part numbers include: TJA1043T, TJA1043TK.

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