The LPC185x/3x/2x/1x are Arm Cortex-M3 based microcontrollers for embedded
applications. The Arm Cortex-M3 is a next generation core that offers system
enhancements such as low power consumption, enhanced debug features, and a high
level of support block integration.
The LPC185x/3x/2x/1x operate at CPU frequencies of up to 180 MHz. The Arm
Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals. The Arm
Cortex-M3 CPU also includes an internal prefetch unit that supports speculative
The LPC185x/3x/2x/1x include up to 1 MB of flash and 136 kB of on-chip SRAM, 16 kB of
EEPROM memory, a quad SPI Flash Interface (SPIFI), a State Configurable Timer (SCT)
subsystem, two High-speed USB controllers, Ethernet, LCD, an external memory
controller, and multiple digital and analog peripherals.