LPC80X: Low-Cost Microcontrollers (MCUs) based on Arm^® Cortex^®-M0+ Core

Overview

LPC80x is a cost-effective Arm Cortex-M0+ based 32-bit MCU family operating at CPU frequencies of up to 15 MHz. The LPC80x MCU family supports up to 32 KB of flash memory and up to 4 KB of SRAM.

This family features a power-optimized core, small footprint in popular packages, and level shifting options thanks to its separate power rails. The peripheral complement of the LPC80x includes a CRC engine, I²C-bus interfaces, up to two USARTs, one SPI interface, capacitive touch interface (cap touch), one multi-rate timer, self-wake-up timer, one general purpose 32-bit counter/timer, one 12-bit ADC, one 10-bit DAC, one analog comparator, function-configurable I/O ports through a switch matrix, an input pattern match engine, programmable logic unit (PLU), and up to 30 general-purpose I/O pins.

This device is fully supported by NXP’s MCUXpresso Software and Tools, a comprehensive and cohesive set of free software development tools for Kinetis, LPC and i.MX RT microcontrollers. MCUXpresso SDK also includes project files for Keil MDK and IAR EWARM.

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Features

System

Arm Cortex-M0+ processor (revision r0p1), running at frequencies of up to 15 MHz with single-cycle multiplier and fast single-cycle I/O port
Arm Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC)
System tick timer
AHB multilayer matrix
Serial Wire Debug (SWD) with four break points and two watchpoints. JTAG boundary scan (BSDL) supported

Memory

Up to 32 KB on-chip flash programming memory
Code Read Protection (CRP)
Up to 4 KB SRAM
Dual I/O power (LPC802M011JDH20, LPC804M111JDH24):
- Independent supplies on each package side permitting level-shifting signals from one off-chip voltage domain to another and/or interfacing directly to off-chip peripherals operating at different supply levels

ROM API support

Bootloader
Supports Flash In-Application Programming (IAP)
Supports In-System Programming (ISP) through USART
On-chip ROM APIs for integer divide
Free Running Oscillator (FRO) API

Digital peripherals

High-speed GPIO interface connected to the Arm Cortex-M0+ I/O bus with up to 30 General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors, programmable open-drain mode, and input inverter. GPIO direction control supports independent set/clear/toggle of individual bits
High-current source output driver (20 mA) on three pins
GPIO interrupt generation capability with a boolean pattern-matching feature on eight GPIO inputs. (LPC804)
Switch matrix for flexible configuration of each I/O pin function
CRC engine
Capacitive Touch Interface. (LPC804)
Programmable Logic Unit (PLU) to create small combinatorial and/or sequential logic networks including simple state machines. (LPC804)

Timers

One 32-bit general purpose counter/timer, with four match outputs and three capture inputs. Supports PWM mode, and external count
Multi-Rate Timer (MRT) for repetitive interrupt generation at up to four programmable, fixed rates
Self-Wake-up Timer (WKT) clocked from either Free Running Oscillator (FRO), a low-power, low-frequency internal oscillator, or an external clock input
Windowed Watchdog timer (WWDT)

Analog peripherals

One 12-bit ADC with up to 12 input channels with multiple internal and external trigger inputs and with sample rates of up to 480 Ksamples/s. The ADC supports two independent conversion sequences
Comparator with five input pins and external or internal reference voltage
One 10-bit DAC. (LPC804)

Serial peripherals

Two USART interfaces with pin functions assigned through the switch matrix and one fractional baud rate generators
One SPI controllers with pin functions assigned through the switch matrix
Up to two I2C-bus interfaces. It supports data rates up to 400 kbit/s on standard digital
pins

Clock generation

Free Running Oscillator (FRO). This oscillator provides a selectable 9 MHz, 12 MHz and 15 MHz outputs that can be used as a system clock. The FRO is trimmed to ±1 % accuracy over the entire voltage and temperature range of 0 °C to 70 °C
1 MHz low power oscillator can be used as a clock source
Clock output function with divider that can reflect all internal clock sources

Power control

Reduced power modes: sleep mode, deep-sleep mode, power-down mode, and deep power-down mode
Wake-up from deep-sleep and power-down modes of activity on USART, SPI, and I2C peripherals
Wake-up from deep power-down mode on multiple pins
Timer-controlled self-wake-up from sleep, deep-sleep, and power-down modes
Power-On Reset (POR)
Brownout detect (BOD)

Additional features

Unique device serial number for identification
Single or dual power supplies (1.71 V to 3.6 V)
Operating temperature range -40 °C to +105 °C
Available in TSSOP16, TSSOP20, TSSOP24 and HVQFN33 packages
Supported by MCUXpresso SDK, IDE and Config Tools

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Features

System

Arm Cortex-M0+ processor (revision r0p1), running at frequencies of up to 15 MHz with single-cycle multiplier and fast single-cycle I/O port
Arm Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC)
System tick timer
AHB multilayer matrix
Serial Wire Debug (SWD) with four break points and two watchpoints. JTAG boundary scan (BSDL) supported

Memory

Up to 32 KB on-chip flash programming memory
Code Read Protection (CRP)
Up to 4 KB SRAM
Dual I/O power (LPC802M011JDH20, LPC804M111JDH24):
- Independent supplies on each package side permitting level-shifting signals from one off-chip voltage domain to another and/or interfacing directly to off-chip peripherals operating at different supply levels

ROM API support

Bootloader
Supports Flash In-Application Programming (IAP)
Supports In-System Programming (ISP) through USART
On-chip ROM APIs for integer divide
Free Running Oscillator (FRO) API

Digital peripherals

High-speed GPIO interface connected to the Arm Cortex-M0+ I/O bus with up to 30 General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors, programmable open-drain mode, and input inverter. GPIO direction control supports independent set/clear/toggle of individual bits
High-current source output driver (20 mA) on three pins
GPIO interrupt generation capability with a boolean pattern-matching feature on eight GPIO inputs. (LPC804)
Switch matrix for flexible configuration of each I/O pin function
CRC engine
Capacitive Touch Interface. (LPC804)
Programmable Logic Unit (PLU) to create small combinatorial and/or sequential logic networks including simple state machines. (LPC804)

Timers

One 32-bit general purpose counter/timer, with four match outputs and three capture inputs. Supports PWM mode, and external count
Multi-Rate Timer (MRT) for repetitive interrupt generation at up to four programmable, fixed rates
Self-Wake-up Timer (WKT) clocked from either Free Running Oscillator (FRO), a low-power, low-frequency internal oscillator, or an external clock input
Windowed Watchdog timer (WWDT)

Analog peripherals

One 12-bit ADC with up to 12 input channels with multiple internal and external trigger inputs and with sample rates of up to 480 Ksamples/s. The ADC supports two independent conversion sequences
Comparator with five input pins and external or internal reference voltage
One 10-bit DAC. (LPC804)

Serial peripherals

Two USART interfaces with pin functions assigned through the switch matrix and one fractional baud rate generators
One SPI controllers with pin functions assigned through the switch matrix
Up to two I2C-bus interfaces. It supports data rates up to 400 kbit/s on standard digital
pins

Clock generation

Free Running Oscillator (FRO). This oscillator provides a selectable 9 MHz, 12 MHz and 15 MHz outputs that can be used as a system clock. The FRO is trimmed to ±1 % accuracy over the entire voltage and temperature range of 0 °C to 70 °C
1 MHz low power oscillator can be used as a clock source
Clock output function with divider that can reflect all internal clock sources

Power control

Reduced power modes: sleep mode, deep-sleep mode, power-down mode, and deep power-down mode
Wake-up from deep-sleep and power-down modes of activity on USART, SPI, and I2C peripherals
Wake-up from deep power-down mode on multiple pins
Timer-controlled self-wake-up from sleep, deep-sleep, and power-down modes
Power-On Reset (POR)
Brownout detect (BOD)

Additional features

Unique device serial number for identification
Single or dual power supplies (1.71 V to 3.6 V)
Operating temperature range -40 °C to +105 °C
Available in TSSOP16, TSSOP20, TSSOP24 and HVQFN33 packages
Supported by MCUXpresso SDK, IDE and Config Tools

Data Sheets

Application Notes

Sample

LPC80x and LPC8N04 MCU Families

Introducing the low-cost LPC802 MCU

Get Started Fast! Learn How to Quickly Get Started Using the LPC802 Code Bundle

Learn More about LPC804 MCUs, Development Board and the Programmable Logic Unit Feature

Get to know the LPC804 MCU and Associated Development Boards

LPC80x MCU系列：生态合作体系概述

LPC80x微控制器系列：开关矩阵技术详解

LPC80x微控制器系列：串口通信技术详解

LPC80x微控制器系列：逻辑匹配机制技术详解

LPC80x微控制器系列：可编程逻辑单元技术详解

LPC80x微控制器系列：触摸按键技术详解

LPC80x and LPC8N04 MCU Families
Introducing the low-cost LPC802 MCU
Get Started Fast! Learn How to Quickly Get Started Using the LPC802 Code Bundle
Learn More about LPC804 MCUs, Development Board and the Programmable Logic Unit Feature
Get to know the LPC804 MCU and Associated Development Boards
LPC80x MCU系列：生态合作体系概述
LPC80x微控制器系列：开关矩阵技术详解
LPC80x微控制器系列：串口通信技术详解
LPC80x微控制器系列：逻辑匹配机制技术详解
LPC80x微控制器系列：可编程逻辑单元技术详解
LPC80x微控制器系列：触摸按键技术详解