MCX W70 Secure and Ultra-Low-Power MCUs for Bluetooth® Channel Sounding, Matter, Thread and Zigbee

  • This page contains information on a preproduction product. Specifications and information herein are subject to change without notice. For additional information please contact your sales representative.

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Block Diagram

MCX W70

MCX W70 Block Diagram

Features

Core Platform

  • Arm Cortex-M33 @ 96 MHz for the system, with TrustZone, a memory protection unit (MPU), digital signal processing (DSP) and a floating-point unit (FPU)
  • Arm Cortex-M33 @ 96 MHz for the NBU/radio subsystem, with MPU support

Memory

  • 1.5 MB Flash
  • 320 kB ROM
  • 256 kB (system) + 20 kB (Localization Compute Engine Lite [LCE-Lite]) static random-access memory (SRAM)

Security

  • Digital tamper pins, glitch detection
  • True random number generator (TRNG)
  • Flash access protection, Secure Debug
  • AES-256, RSA, ECC and SHA-2
  • Public-key cryptography (PKC), universally unique identifier (UUID) and hardware root of trust (HW RoT)
  • Post-quantum cryptography (PQC), SM2, SM3 and SM4
  • Trusted resource domain controller (TRDC), cyclic redundancy check (CRC) and glitch detector
  • Intrusion and Tamper Response Controller (ITRC)

Clocks

  • 32 kHz oscillator (OSC_32K), 32 kHz free-running oscillator (FRO_32K)
  • OSC 32M narrowband unit (NBU)
  • FRO-192M
  • FRO-200M
  • System Clock Generator (SCG)
  • Peripheral Clock Control (PCC/MRCC)

Communication Interfaces

  • One flexible controller area network (FlexCAN)
  • Two low-power universal asynchronous receiver-transmitters (LPUART)
  • Three low-power serial peripheral interfaces (LPSPI)
  • Two low-power inter-integrated circuits (LPI²C)

Analog

  • 16-bit analog-to-digital converter (ADC), 8-channel, with a 4 Msps conversion rate
  • One low-power analog comparator (LPCMP)

Timers

  • Five timer/pulse-width modulation (PWM)
  • Two watchdog timer (WDT)
  • One low-power interrupt timer (LPIT)
  • Two timestamp timer
  • Two code WDOG
  • Two low-power timers (LPTMR)
  • One optimized flexible pulse-width modulation (FlexPWM)
  • One SFA

Human Machine Interfaces (HMI)

  • 32 general-purpose input/output (GPIO) (48-pin package)

Power Management

  • Efficient DC-DC converters and low-dropout regulators (LDOs)
  • ~4 µA Deep Sleep with 256 kB RAM retention

Radio

  • Bluetooth LE 6.0 (BCS)
  • IEEE 802.15.4-2006-compliant physical layer (PHY) and medium access control (MAC) (Thread, Zigbee, dual PAN)
  • IEEE 802.15.4j-2012 Medical Body Area Network (MBAN) frequency bands spanning 2360–2400 MHz
  • Generic 2-level frequency-shift keying (FSK)/Gaussian frequency-shift keying (GFSK)/minimum shift keying (MSK)/Gaussian minimum shift keying (GMSK)
  • Concurrent 802.15.4 and Bluetooth LE operation

Accelerators

  • 16-channel secure enhanced direct memory access (eDMA), DSP-V lite for CS

Packaging

  • 48QFN, 7 x 7 mm, 32 GPIO
  • 64MAPBGA, 5 x 5 mm, 32 GPIO

Operating Characteristics

  • -40 °C to Tj 125 °C

Documentation

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1 documents

Compact List

Design Resources

Hardware

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Software

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Note: For better experience, software downloads are recommended on desktop.

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