MCX N23x Highly Integrated MCUs with On-Chip Accelerators, Intelligent Peripherals and Advanced Security

MCX-N23X new

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Block Diagram


MCX N23x Block Diagram


Core Platform

  • Arm® Cortex®-M33 @ 150 MHz

Processing Accelerators

  • SmartDMA (coprocessor for applications such as parallel camera interface and keypad scanning)


  • Up to 1 MB (2 x 512 KB Bank) on chip flash memory
    • Supporting Flash Swap and Read While Write
  • Cache Engine with 16 KB RAM
  • Up to 352 KB RAM, configurable as up to 288 KB with ECC (support single bit correction and two-bits detection)
    • Up to 4x 8 KB ECC RAM can be retained down to VBAT mode
  • 256 KB ROM with secure bootloader


  • Analog
    • 2x 16-bit ADC, supporting 4 parallel conversions
      • Each ADC can be used as two single end input ADC, or one differential input ADC
      • Up to 2 Msps in 16 bit mode and 3.15 Msps in 12 bit mode
      • Up to 61 ADC Input channels (depending on the package)
      • One integrated temperature sensor per ADC
    • Two High-speed Comparators with 11 input pins and 8-bit DAC as internal reference
    • 2x CMP is functional down to Deep Power-down mode
    • High accurate VREF ±2 mV error and 15 ppm/deg C drift
  • Timers
    • Five 32-bit standard general-purpose asynchronous timers/counters, which support up to four capture inputs and four compare outputs, PWM mode and external count input. Specific timer events can be selected to generate DMA requests.
    • Low-Power Timer
    • Frequency measurement timer
    • Multi-Rate Timer
    • Windowed watchdog Timer
    • RTC with calendar
    • Wake Timer
    • Micro-Tick Timer (UTICK)
    • OS Event Timer
  • Communication interfaces
    • USB high-speed (Host/Device) with on-chip HS PHY
    • 8x LP Flexcomms each supporting SPI, I2C, UART
    • 2x FlexCAN with FD
    • 2x I3C
  • Human-Machine Interfaces
    • 1x FlexIO programmable as a variety of serial and parallel interfaces, including, but not limited to Display Driver and camera interface
    • 2x Serial Audio Interface (SAI)
    • Digital PDM Microphone
      • Allows connection of up to 4 MEMS microphones with PDM output
  • Advanced Motor Control
    • 2x FlexPWM each with 4 submodules, providing 12 PWM outputs (no Nanoedge module)
    • 2x Quadrature Decoder (QDC)
    • 1x Event Generator (AND/OR/INVERT) module support up to 8 output trigger


  • EdgeLock® Secure Enclave, Core Profile
    • Cryptographic services (incl. AES-256, SHA-2, ECC NIST P-256, TRNG and key generation/derivation)
    • Secure key store with key usage policies (protection of platform integrity, manufacturing and application keys)
    • Device Unique Identity based on Physically Unclonable Function (PUF)
    • Device Attestation with support of Device Identifier Composition Engine (DICE)
    • Secure connection and TLS support
    • Key management over-the-air with preintegration of NXP EdgeLock 2GO
  • EdgeLock® Accelerator (Public Key Cryptography)
  • Immutable secure boot code in ROM
  • Dual Secure Boot Mode (asymmetric mode and fast, postquantum secure symmetric mode)
  • Secure firmware update support
  • Device lifecycle management including secure authenticated debug
  • High-performance on-the-fly memory encryption with additional authentication for external Flash
  • Protected Flash Region (PFR)
  • Security Monitoring:
    • 2x Code watchdog
    • Intrusion and Tamper Response Controller (ITRC)
    • 6 Active and Passive Tamper Pin Detect
    • Voltage, Temperature, Light and Clock Tamper Detect
    • Voltage glitch detect
  • Secure manufacturing and IP theft protection in untrusted factory
  • Arm TrustZone® for Cortex®-M


  • VFBGA184, 9x9mm and HLQFP100, 14x14mm

MCUXpresso Developer Experience

Part numbers include: MCXN235VDFT, MCXN235VNLT, MCXN236VDFT, MCXN236VNLT.


Quick reference to our documentation types.

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Design Resources


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Note: For better experience, software downloads are recommended on desktop.


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