Arm® Cortex®-A5 + Cortex-M4 MPUs, 1.5 MB SRAM, LCD, Security, Ethernet, L2 Switch

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Block Diagram

VF6xx Block Diagram

VFxxx VF6xx Block Diagram


  • Dual heterogeneous core: Cortex-A5 and Cortex-M4
  • Optional 512 KB L2 Cache
  • 1.5 MB on-chip SRAM (1.0 MB when L2 Cache is selected)
  • Dual USB 2.0 OTG with integrated PHY
  • Dual Ethernet 10/100 MAC with L2 switch
  • Both digital and analog video camera interfaces
  • Dual display controllers supporting resolutions up to SVGA or one display up to XGA (1024x768)
  • High-assurance boot with crypto acceleration
  • 800 MHz DDR3 and LPDDR2 support with 8-bit ECC protection
  • NAND Flash controller and dual quad-SPI with Execute-In-Place (XIP)
  • Dual 12-bit ADC and DAC; dual SDIO


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Design Resources

Design Files

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  • Models

    VFxxx F Series 364MAPBGA BSDL Silicon Revision 1.1

  • Models

    VFxxx F Series 364MAPBGA IBIS Model Silicon Revision 1.1


4 hardware offerings


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Note: For better experience, software downloads are recommended on desktop.

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