Application Note (7)
-
LPC29xx Power-down mode explained[AN10795]
-
UUencoding for UART ISP[AN11229]
-
Migrating to the LPC1700 series[AN10878]
The LPC2917/2919/01 combine an ARM968E-S CPU core with two integrated TCM blocks operating at frequencies of up to 125 MHz, CAN and LIN, 56 kB SRAM, up to 768 kB flash memory, external memory interface, two 10-bit ADCs, and multiple serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communication markets. To optimize system power consumption, the LPC2917/2919/01 has a very flexible Clock Generation Unit (CGU) that provides dynamic clock gating and scaling.

Choose a diagram:

Note: To see the product features close this window.
|
|
|
|
|
|
|
|---|---|---|---|---|---|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Quick reference to our documentation types
1-10 of 16 documents
Compact List
Please wait while your secure files are loading.
2 design files
Receive the full breakdown. See the product footprint and more in the eCad file.
Please wait while your secure files are loading.