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The NXP^® LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB 2.0 On-The-Go (OTG), up to 192 KB SRAM, NAND flash controller, flexible external bus interface, four channel 10-bit ADC, and a myriad of serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communication markets. To optimize system power consumption, the LPC3130/3131 have multiple power domains and a very flexible Clock Generation Unit (CGU) that provides dynamic clock gating and scaling.

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Data Sheet

Application Notes

Product Details

Block Diagram

Block diagram: LPC3130FET180, LPC3131FET180

Get diagram PDF

Features

CPU platform

180 MHz, 32-bit ARM926EJ-S
16 kB D-cache and 16 kB I-cache
Memory Management Unit (MMU)

Internal memory

96 kB (LPC3130) or 192 kB (LPC3131) embedded SRAM

External memory interface

NAND flash controller with 8-bit ECC
8/16-bit Multi-Port Memory Controller (MPMC): SDRAM and SRAM

Communication and connectivity

High-speed USB 2.0 (OTG, Host, Device) with on-chip PHY
Two I²S-bus interfaces
Integrated leader/follower SPI
Two controller/target I²C-bus interfaces
Fast UART
Memory Card Interface (MCI): MMC/SD/SDIO/CE-ATA
Four-channel 10-bit ADC
Integrated 4/8/16-bit 6800/8080 compatible LCD interface

System functions

Dynamic clock gating and scaling
Multiple power domains
Selectable boot-up: SPI flash, NAND flash, SD/MMC cards, UART, or USB
DMA controller
Four 32-bit timers
Watchdog timer
PWM module
Random Number Generator (RNG)
General Purpose I/O (GPIO) pins
Flexible and versatile interrupt structure
JTAG interface with boundary scan and Arm^{^®} debug access

Operating voltage and temperature

Core voltage: 1.2 V
I/O voltage: 1.8 V, 2.8 V, 3.3 V
Temperature: -40 Cel to +85 Cel

TFBGA180 package: 12 x 12 mm², 0.8 mm pitch

Buy/Parametrics

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Documentation

Quick reference to our documentation types

1-10 of 11 documents

Compact List

Using the LCD interface in the LPC313x/LPC314x/LPC315x devices[AN10880]

PDFMar 6, 2015Rev 1.0
UUencoding for UART ISP[AN11229]

PDFJul 6, 2012Rev 1.0
PCB layout guidelines for NXP^® MCUs in BGA packages[AN10778]

PDFApr 22, 2011Rev 2.0
Programming and booting from NAND flash on the EA3100[AN10901]

PDFJan 7, 2010Rev 1.0
LPC313x NAND flash data and bad block management[AN10860]

PDFAug 11, 2009Rev 1.0
Programming SPI flash on EA3131 boards[AN10811]

PDFMay 1, 2009Rev 1.0

Industry’s Lowest Cost Arm^®9 with High-Speed USB 2.0 OTG; NXP Arm926EJ-S processor LPC313x[75016629]

PDFAug 31, 2008Rev 1.0

Low-cost, low-power Arm926EJ-S MCUs with high-speed USB 2.0 OTG, SD/MMC, and NAND flash controller[LPC3130_31]

PDFMay 29, 2012Rev 2.0

thin fine-pitch ball grid array package; 180 balls[SOT570-3]

PDFFeb 8, 2016Rev 1.0

ADC design guidelines[TN00009]

PDFMay 9, 2014Rev 1.0

Design Resources

Design Files

Quick reference to our design files types.

2 design files

Receive the full breakdown. See the product footprint and more in the eCad file.

Models
IBIS models for LPC3130 and LPC3131 pkg TFBGA-180

ZIPRev 1Jun 13, 2017 16:19:00122.55 KBIBISLPC3130_LPC3131_TFBGA-180
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Models
BSDL for LPC313x and LPC314x pkg TFBGA

ZIPRev 1Jun 13, 2017 11:57:005.44 KBBSDL_LPC313X-LPC314X-TFBGA
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Low-cost, low-power Arm926EJ-S™ MCUs with high-speed USB 2.0 OTG, SD/MMC, and NAND flash controller

Product Details

Block Diagram

Block diagram: LPC3130FET180, LPC3131FET180

Features

CPU platform

Internal memory

External memory interface

Communication and connectivity

System functions

Operating voltage and temperature

Buy/Parametrics

Documentation

Filter by

Application Note (6)

Using the LCD interface in the LPC313x/LPC314x/LPC315x devices[AN10880]

UUencoding for UART ISP[AN11229]

PCB layout guidelines for NXP® MCUs in BGA packages[AN10778]

Programming and booting from NAND flash on the EA3100[AN10901]

LPC313x NAND flash data and bad block management[AN10860]

Programming SPI flash on EA3131 boards[AN10811]

Brochure (1)

Industry’s Lowest Cost Arm®9 with High-Speed USB 2.0 OTG; NXP Arm926EJ-S processor LPC313x[75016629]

Data Sheet (1)

Low-cost, low-power Arm926EJ-S MCUs with high-speed USB 2.0 OTG, SD/MMC, and NAND flash controller[LPC3130_31]

Package Information (1)

thin fine-pitch ball grid array package; 180 balls[SOT570-3]

Supporting Information (1)

ADC design guidelines[TN00009]

User Guide (1)

LPC3130/31 User manual[UM10314]

Design Resources

Design Files

Filter by

IBIS models for LPC3130 and LPC3131 pkg TFBGA-180

BSDL for LPC313x and LPC314x pkg TFBGA

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Suggested Links

Low-cost, low-power Arm926EJ-S^™ MCUs with high-speed USB 2.0 OTG, SD/MMC, and NAND flash controller

PCB layout guidelines for NXP^® MCUs in BGA packages[AN10778]

Industry’s Lowest Cost Arm^®9 with High-Speed USB 2.0 OTG; NXP Arm926EJ-S processor LPC313x[75016629]