2 design files
BSDL for LPC18xx and LPC43xx
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The LPC43S6x are Arm Cortex-M4 based microcontrollers for embedded applications which include an Arm Cortex-M0 coprocessor and an Arm Cortex-M0 subsystem for managing peripherals, up to 1 MB of flash and 154 kB of on-chip SRAM, 16 kB of EEPROM memory, a quad SPI Flash Interface (SPIFI), advanced configurable peripherals such as the SCTimer/PWM and the Serial General Purpose I/O (SGPIO) interface, security features with AES engine, two High-speed USB controllers, Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals. The LPC43S6x operate at CPU frequencies of up to 204 MHz.
The Arm Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The Arm Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The Arm Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point processor is integrated into the core.
The LPC43S6x include an application Arm Cortex-M0 coprocessor and a second Arm Cortex-M0 subsystem for managing the SGPIO and SPI peripherals.The Arm Cortex-M0 coprocessor is an energy-efficient and easy-to-use 32-bit core which is upward code- and tool-compatible with the Cortex-M4 core. The Cortex-M0 coprocessor, designed as a replacement for existing 8/16-bit microcontrollers, offers up to 204 MHz performance with a simple instruction set and reduced code size. The Cortex-M0 coprocessor hardware multiply is implemented as a 32-cycle iterative multiplier.
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