Layerscape® Access LA12xx Programmable Baseband Processor

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Block Diagram

Layerscape Access LA12xx Block Diagram

Layerscape Access LA1200 Block Diagram


Core and Memory Complex

  • 6x 32-bit e200 Power® Architecture core complex @ 614.4 MHz
  • Up to 8x VSPA3-16 @ 614.4 MHz (=1.3 TFLOP)
  • 2MB On-Chip SRAM memory

Connectivity and I/O

  • 2x PCIe Gen3 up to 8 lanes total
  • 2x {I+Q} HS-DCS complex sampling rate of 1966.08 or 983.04 Msps
    • Dual channel, <1GHz RF channel bandwidth at mmWave bands
  • 4x {I+Q} LS-DCS complex sampling up to 491.52 Msps
    • Four channel, <140 MHz RF channel bandwidth at sub-6 GHz bands


  • Forward Error Correction Unit (FECU)
    • 3GPP 5G/NR 38.212 compliant gNB and UE modes
    • Polar decoder/encoder
    • LDPC decoder/encoder


  • FC-PBGA package

Comparison Table

LA12xx Family Comparison Table

Application Device Family Part Number FECA DSP-Cores Low-Speed DCS High-Speed DCS
O-DU LA120x LA1200 N/A N/A
LA1201 8x
O-RU LA121x LA1212 N/A 8x 2T2R N/A
LA1214 8x 4T4R N/A
LA1215 8x N/A mmWave
LA1216 8x 2T2R 1*Rx Only
LA1218 8x 4T4R 2*Rx Only
FWA-CPE LA122x LA1223 8x 2T2R N/A
LA1224 8x Dual Use Dual Use
LA1325 8x N/A mmWave
ISC LA123x LA1232 8x 2T2R N/A
LA1234 8x 4T4R N/A
LA1235 8x N/A mmWave
LA1236 8x 2T2R 1*Rx Only
LA1238 8x 4T4R 2*Rx Only

Software Support

NXP provides CodeWarrior, the Integrated Development Environment associated with Layerscape Access and many other NXP devices. Included in this environment is a multi-generational, mature compiler as well as access to a rich suite of existing software / signal processing libraries, examples and training material.

A broad ecosystem and comprehensive development platform support is essential to ease development and speed time to market for a commercial grade 3GPP Stacks. All L1 and L2/+ software stack is available from NXP and/or partners depending on the device category and other requirements.

Hardware Tools

Customers can implement and develop their applications with LA12xx evaluation hardware. The LA12xx Evaluation Board is a combination of NXP LX2160 multicore Arm® processor as host and LA12xx modem as baseband for 5G-NR Fixed Wireless applications. The boards come with pre-loaded board support package (BSP) based on a standard Linux kernel.


Quick reference to our documentation types.

3 documents

Design Resources

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1 hardware offering


1 software file

Note: For better experience, software downloads are recommended on desktop.


1 trainings


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