The LS1 family, which includes the LS1021A communications processor, is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale.
A member of the value-performance tier, the LS1021A processor provides extensive integration and power efficiency for fanless, small form factor enterprise networking applications. Incorporating dual Arm® Cortex®-A7 cores running up to 1.2 GHz, the LS1021A processor is engineered to deliver CoreMark® performance of over 7,000, as well as virtualization support, advanced security features and the broadest array of high-speed interconnects and optimized peripheral features ever offered in a sub-3 W processor.
The LS1021A processor features an integrated LCD controller, CAN controller for implementing industrial protocols, DDR3L/4 running up to 1600 MHz, integrated security engine and QUICC Engine® and ECC protection on both L1 and L2 caches. The LS1021A processor is pin- and software-compatible with the LS1020A and LS1022A processors.
Layerscape processors are part of NXP's EdgeVerse™ edge computing platform.
Evaluation and Development Boards
Reference Design
Reference Design
Emulators, Probes, and Programmers
Emulators, Probes, and Programmers
.png?imwidth=300)
.png?imwidth=300)
