LS1020A

For best experience this site requires Javascript to be enabled. To enable on your browser, follow our accessibility instructions.

Click over video to play

The LS1 family, which includes the LS1020A and LS1022A communications processors, is built on Layerscape architecture, the industry’s first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale.

Members of the value-performance tier, the LS1020A and LS1022A processors provide extensive integration and power efficiency for fanless, small form factor enterprise and consumer networking applications. Incorporating dual Arm^® Cortex^®-A7 cores running up to 1.2 GHz, the LS1020A and LS1022A processors deliver pre-silicon CoreMark^® performance of over 7,000, as well as virtualization support, advanced security features and broadest array of high-speed interconnects and optimized peripheral features ever offered in a sub-3 W processor (LS1022A processor is sub-2W typical).

The LS1020A and LS1022A processors features support for multiple industrial protocols, DDR3L/4 running up to 1600 MHz, integrated hardware-based security engine and QUICC Engine^®. and ECC protection on both L1 and L2 caches. The LS1020 and LS1022A processors are pin- and software-compatible with the LS1021A processor.

Layerscape processors are part of NXP's EdgeVerse™ edge computing platform.

Data Sheet

Reference Manual

Product Details

Block Diagram

Choose a diagram:

29841_LS1022A_BD
29841_LS1020A_BD

29841_LS1022A_BD

NXP Layerscape 1022A Processor block diagram

29841_LS1020A_BD

NXP Layerscape 1020A Processor block diagram

Get diagram PDF

Features

Core Complex

Dual Arm^{^®} v7 Cortex^®-A7 32-bit cores, each supporting dual precision floating point and NEONSIMD module running up to 1.2 GHz (LS1020A) or 600 MHz (LS1022A)
32 KB instruction and data L1 cache with single bit error detection and correction, ECC protection on both instruction and data caches
Up to 512 KB coherent L2 cache with single bit error detection and correction, ECC protection

Networking Elements

SerDes
- 4 lane at up to 6 GHz (LS1020A)
  - Supports SGMII, PCIe and SATA
  - Ethernet
- 1 lane at up to 5 GHz (LS1022A)
  - Supports PCIe^{^®}
Three virtualized enhanced triple-speed Ethernet controllers (VeTSEC) supporting SGMII (up to 2),RGMII, RMII, MII (LS1020A)
- Support IEEE^® 1588
Two virtualized enhanced triple-speed Ethernet controllers (VeTSEC) supporting RGMII, RMII, MII
- Support IEEE 1588
Two PCIe Gen2 controllers (LS1020A)
- Supporting up to 5G/tps in 1-lane, 2-lane, or 4-lane (with a single controller)
- MSI supported
One PCIe Gen2 controller
- Supporting up to 5G/tps in 1-lane
- MSI supported

Accelerators and Memory Control

DDR memory controller supports DDR3L and DDR4 at up to 1600 MHz (LS1020A)
- 8-bit, 16-bit, 32-bit memory supported, with ECC support
DDR memory controller supports DDR3L at up to 1000 MHz
- 8-bit, 16-bit memory supported, with ECC support
Security Engine (SEC5.4) features five cryptographic hardware acceleration modules, true random number generator, hashing and CRC unit.

Basic Peripherals and Interconnect

Arm Cache Coherent Interconnect (CCI400)
Arm AMBA4 MPCore Virtualization
Integrated Flash controller supporting 16-bit interface
QuadSPI Flash controller
USB3.0 superspeed controller with integrated PHY, supporting OTG, Host and Device modes (LS1020A)
USB2.0 controller supporting OTG, Host and Device modes
SD/MMC controller
SATA3 controller supporting 6G/tps
3x I²C
2x SPI

Part numbers include: LS1020ASE7HNB, LS1020ASE7KQB, LS1020ASE7MQB, LS1020ASE8KQB, LS1020ASN7HNB, LS1020ASN7KQB, LS1020ASN7MQB, LS1020AXE7HNB, LS1020AXE7KQB, LS1020AXE7MQB, LS1020AXN7HNB, LS1020AXN7KQB, LS1020AXN7MQB, LS1022ASE7EKB, LS1022ASN7EKB, LS1022AXE7EKB, LS1022AXN7EKB.

Comparison Table

	LS1021A	LS1020A	LS1022A
Cores	2	2	2
Core Frequency	Up to 1.2 GHz	Up to 1.2 GHz	Up to 600 MHz
SerDes	4 Lanes	4 Lanes	1 Lanes
Security	SEC 5.4	SEC 5.4	SEC 5.4
DDR 4	Yes	Yes	No
USB 3.0	Yes	Yes	No
LCD Support	Yes	No	No

We recommend the following Power Management IC for LS1020A and LS1022A Processors

Select the specifications below to find the perfect fit for your design

PMIC Part Number	Description	External Memory Voltage (V)	Ambient Operating Temperature (Min-Max) (°C)	Qualification Tier

MC34VR500V1ES	Regulator, Buck, Quad with up to 4.5A Output and Triple User-programmable LDOs, QFN 56	1.35	-40 to 105	Industrial
MC34VR500V2ES	Regulator, Buck, Quad with up to 4.5A Output and Factory programmed LDOs, QFN 56	1.35	-40 to 105	Industrial

Buy/Parametrics

‌ ‌ ‌	‌ ‌	‌ ‌	‌ ‌	‌ ‌	‌ ‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌
‌ ‌ ‌	‌	‌	‌	‌	‌

Documentation

Quick reference to our documentation types.

1-5 of 30 documents

^{Fact Sheet}
Layerscape 1020A and LS1022A - Fact SheetFeatured

PDFRev 3Feb 27, 2020348.9 KBLS1020ALS1022AFSEnglish, 中文
^{White Paper}
Machine-to-Machine (M2M) Gateway: Trusted and Connected Intelligence - White PaperFeatured

PDFRev 0Oct 17, 2013302.0 KBM2MGATEWAYWPEnglish
^{White Paper}
Networking for Industrial and IoT Applications - White PaperFeatured

PDFRev 0Aug 19, 2014339.4 KBQORIQINDIOTWPEnglish, 中文
^{Data Sheet}
LS1022A Data Sheet

PDFRev 7Jun 27, 20191.8 MBLS1022AEnglish
Sign in required
^{Data Sheet}
LS1020A Data Sheet

PDFRev 8Jun 27, 20192.2 MBLS1020AEnglish
Sign in required
^{Reference Manual}
LS1021A Reference Manual

PDFRev 3.1Feb 28, 202034.2 MBLS1021ARMEnglish
Sign in required
^{Reference Manual}
QUICC Engine Block Reference Manual with Protocol Interworking - Reference Manual

PDFRev 9May 3, 201813.4 MBQEIWRMEnglish
Sign in required
^{Application Note}
AN13656: Assembly guidelines for Flip Chip plastic ball grid array and chip scale package Application Note

PDFRev 1Sep 1, 20226.5 MBAN13656English
^{Application Note}
Thermal Management Unit Usage

PDFRev 0Apr 27, 2022241.6 KBAN12310English
^{Application Note}
PBL Configuration using QCVS Application Note

PDFRev 1Nov 30, 20201.0 MBAN5260English, 中文
^{Application Note}
AN4878, LS1021A Design Checklist

PDFRev 6Nov 26, 2019774.6 KBAN4878English
Sign in required
^{Application Note}
AN12270, Bringing up Layerscape devices using CCS script and DRAM boot

PDFRev 0Jan 30, 2019907.3 KBAN12270English, 中文
^{Application Note}
AN5376, How Does QuadSPI Work with a Serial NAND - Application Note

PDFRev 0Sep 26, 2017359.4 KBAN5376English
Sign in required
^{Application Note}
General soldering Temperature Process Guidelines

PDFRev 1Aug 16, 2017281.6 KBAN3300English
^{Application Note}
AN5085, Powering the LS102xA with the MC34VR500 Power Management Interface Chip - Application Note

PDFRev 0Jul 18, 2017281.9 KBAN5085English
^{Application Note}
AN4893, Understanding Endianness on Layerscape LS1021A - Application Note

PDFRev 0Jul 12, 2017905.4 KBAN4893English
Sign in required
^{Application Note}
AN5089, Programming RCW and U-Boot on LS1021A-TWR - Application Note

PDFRev 0Mar 14, 20171.3 MBAN5089English
Sign in required
^{Application Note}
AN5077, Migrating from Power Architecture to Arm^® Architecture

PDFRev 0Jul 28, 2016768.7 KBAN5077English
Sign in required
^{Application Note}
Using an External GCC Toolchain with CodeWarrior for Arm^®v7 Application Note

PDFRev 4Jan 15, 2016824.8 KBAN5048English
^{Application Note}
AN5125, Introduction to Device Trees - Application Note

PDFRev 0Sep 3, 2015566.4 KBAN5125English
^{Application Note}
Adding Custom Registers to the CodeWarrior for Power Architecture Processors

PDFRev 0Jul 15, 2015147.2 KBAN5065English
^{Application Note}
AN4877, PROFIBUS on QUICC Engine Block

PDFRev 1Dec 15, 2014450.8 KBAN4877English
^{Application Note}
AN4039, PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations - Application Note

PDFRev 4Nov 11, 2014468.7 KBAN4039English
^{Application Note}
SerDes Reference Clock Interfacing and HSSI Measurements Recommendations

PDFRev Rev. 0May 13, 2011577.2 KBAN4311English
Sign in required
^{Application Note}
DDR Interleaving for PowerQUICC and QorIQ Processors

PDFRev 1Jun 30, 2010717.3 KBAN3939English
Sign in required
^{Application Note}
Solder Joint Temperature and Package Peak Temperature

PDFRev 0Aug 2, 2006151.6 KBAN3298English
^{Product Brief}
LS1020/22A Family Communications Processor Product Brief

PDFRev 1Jan 18, 2017958.8 KBLS1020APBEnglish
Sign in required
^{Supporting Information}
FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP^® Cryptographic Accelerators - White Paper

PDFRev 1.9Oct 28, 2016303.5 KBFSLNISTCAVPEnglish
^{Supporting Information}
LS1020A_21A_22A Family Customer Export Control Information

PDFRev 1Oct 5, 201617.6 KBLS1020A_21A_22A-PECIEnglish
^{White Paper}
QORIQPMWP, QorIQ Power Management - White Paper

PDFRev 0Mar 30, 20171.4 MBQORIQPMWPEnglish

Show All

Design Resources

Design Files

Receive the full breakdown. See the product footprint and more in the eCad file.

Hardware

Quick reference to our board types.

3 hardware offerings

^{Evaluation and Development Boards}
Layerscape LS1021A Tower^® System ModuleFeatured

TWR-LS1021A
^{Emulators, Probes, and Programmers}
LS Processor Probe Tips for CodeWarrior TAP

CWH-CTP-CTX10-YE
^{Emulators, Probes, and Programmers}
CodeWarrior^® TAP

CW_TAP

5 hardware offerings

^{Embedded Board Solutions}
Rakun LS1 system IP block

Rakun LS1 system IP block is small foot-print, verified and proven building block consisting of CPU and memory subsystem for easy and inexpensive integration. Complete pl...

By Borea Gold Partner
^{Embedded Board Solutions}
uCLS1012A IoT SoM

LS1012A based SMARC SoM for secure IoT applications. It includes Mbarx Secure IoT software for connectivity, telemetry, management, OTA firmware updates over Ethernet or ...

By Arcturus Gold Partner
^{Embedded Board Solutions}
TQMLS102xA

Embedded Dual Cortex A7 module based on LS102xA with high speed interfaces and graphics for many network applications.

By TQ-Systems GmbH Platinum Partner
^{Embedded Board Solutions}
Rakun LS1 uQseven module

Rakun LS1 is uQseven Single Board Computer based on Our LS1021A processor, 1GB DDR memory, 1GB Flash, 1 Gbit/s Ethernet PHY, 4 6Gb/s SerDes for SGMII/PCIe/SATA, PWM chann...

By Borea Gold Partner
^{Embedded Board Solutions}
uCLS1012A VoIP SoM

LS1012A based SMARC SoM for hardened VoIP and IP audio/PA applications. Supports SIP/RTP with audio processing including intelligibility enhancements. SIPxtream + Mbarx s...

By Arcturus Gold Partner