Performance Level Digital Signal Controllers, USB FS OTG, CAN-FD

MC56F83xxx

Product Details

Block Diagram

MC56F83xxx Digital Signal Controllers

MC56F83xxx Digital Signal Controllers Block Diagram

Features

Processor Complex

  • 100MHz 56800EX DSP core
  • JTAG/EOnCE debug controller

Memory

  • 128kB Flash
  • 20kB SRAM
  • 64kB Boot ROM (support I2C, SCI)

System control

  • Intermodule crossbar (support flexible connection among peripherals or GPIOs)
  • Event Generator (support and/or/nor/xor logic operation and multiple trigger modes)
  • Enhanced DMA (support minor and major loop, more flexible data transition and less CPU intervention)
  • Memory resource protection
  • LVI, POR and brownout reset
  • CRC
  • Internal and external watchdog

Timers

  • Eight channels 312ps high-resolution PWM
  • 1x Quad Timer to support four-channel capture
  • 1x Quadrature Decoder
  • 2x 32-bit PIT

Analog

  • 2x 12-bit ADC each w/ x2/4 PGA, each up to 1.6MSps sample rate
  • 2x Operational Amplifier, 8MHz GBP, support up to x16 PGA mode
  • 1x 12-bit buffered DAC
  • 4x Analog Comparator each w/ 8-bit DAC

Communications

  • 2x LPI2C, support full PMBus
  • 1x SPI
  • 2x UART

Packages

  • LQFP100
  • LQFP80
  • LQFP64
  • LQFP48

Temperatures

  • -40 to 105°C
  • -40 to 125°C

Enablements

  • MC56F81000-EVK (can connect with low-voltage FRDM-LV driver board)
  • HVP-56F81768 EVK (can connect with high-voltage HVP-MC3PH driver board)
  • Motor control and digital power reference designs
  • CodeWarrior IDE
  • Software Development Kit (SDK)
  • GUI Config Tools (Pin, Clock, Peripherals)
  • FreeMaster debug tool
  • PEMicro Multilink and Cyclone support

Certifications

  • IEC60730 Class-B Safety

Key Parametrics

  • Status
    Active

Documentation

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Design Resources

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Hardware

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Software

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Note: For better experience, software downloads are recommended on desktop.

Training

1 trainings