Wi-Fi® 6 1x1 Concurrent Dual Wi-Fi (CDW) and Bluetooth® 5.3 Combo SoC

Block Diagram

Choose a diagram:

Application block diagram (internal PA/LNA/SW)

Application block diagram (internal PA/LNA/SW)

Application block diagram (FEM)

Application block diagram (FEM)

Internal Block Diagram - 1x1 Concurrent Dual-Wireless Mode

Internal Block Diagram - 1x1 Concurrent Dual-Wireless Mode

Internal Block Diagram - 2x2 Single-MAC Mode

Internal Block Diagram - 2x2 Single-MAC Mode

Features

Wi-Fi Key Features

  • Concurrent Wi-Fi 6 and Wi-Fi 5 1x1 SISO operation
  • Single-MAC Wi-Fi 6 2x2 MIMO operation
  • 1024 QAM
  • MU-MIMO
  • OFDMA
  • Target Wake Time (TWT)
  • WPA2, WPA3

Bluetooth Key Features

  • Bluetooth 5.3 specification support
  • Bluetooth Class 1.5 and Class 2
  • BDR and EDR: 1 Mbit/s, 2 Mbit/s and 3 Mbit/s
  • Bluetooth Low Energy (LE) 1 Mbit/s and 2 Mbit/s
  • Bluetooth Low Energy Long Range
  • Two wide-band speech links
  • Up to 16 Bluetooth LE links
  • Bluetooth LE ultra-low power mode
  • Wi-Fi/Bluetooth coexistence protocol support

General Features

  • Efficient power management supporting low power modes
  • PCIe and UART host interfaces
  • Independent ARM-based Wi-Fi and Bluetooth CPUs
  • Integrated RF PAs / LNAs, T/R switch, and internal low-voltage regulator
  • AEC-Q100 Grade 3 (-40°C to +85°C) support

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Documentation

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Design Files

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Hardware

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Software

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4 software offerings

Engineering Services

5 engineering services

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