Hardware
2 hardware offerings
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Evaluation and Development BoardsPCAL6534 Evaluation Board
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Evaluation and Development BoardsPCAL6534EV 34-Bit GPIO Arduino® Shield
Ultra-Low-Voltage, Level Translating, 34-Bit I2C-Bus/SMBus I/O Expander
PCAL6534 Receive alerts
The PCAL6534 is a 34-bit general-purpose I/O expander that provides remote I/O expansion for many microcontroller families via the Fast-mode Plus (Fm+) I2C-bus interface. The ultra-low-voltage interface allows for direct connection to a microcontroller operating down to 0.8 V.
The PCAL6534 includes level translating from the 1.65V to 5.5V I/O range and Agile I/O input latch, programmable output current, and integrated resistors. The benefits of the PCAL6534 are a wide voltage range for matching today’s lowest voltage FPGAs/processors and tiny package size, saving the cost and size of additional IOs in the processor. A GPIO expander such as the PCAL6534 can also simplify routing by pulling the I/Os for system management way from the processor, which may be densely packed with other critical functions.
The PCAL6534 is offered in a 2.6 mm x 3 mm VFBGA 42-pin package with 0.4 mm bump spacing.
Product Details
Features
Key Features
- Operating power supply voltage range of 0.8 V to 3.6 V on the I2C-bus
- Allows bidirectional voltage-level translation and GPIO expansion between 0.8 V to 3.6 V SCL/SDA and 1.8V, 2.5V, 3.3V, 5.5V I/O ports
- Low standby current consumption: 2.0 µA typical at 3.3 V VDD(P)
- Schmitt trigger action allows slow input transition and better switching noise immunity at the SCL and SDA inputs
- Vhys = 0.05 V (typical) at 0.8 V
- Vhys = 0.18 V (typical) at 1.8 V
- Vhys = 0.33 V (typical) at 3.3 V
- 5.5 V tolerant I/O ports and 3.6 V tolerant I2C-bus lines
- 1MHz Fast-mode Plus I2C-bus
- Active LOW reset input (RESET)
- Open-drain active LOW interrupt output (INT)
- Internal power-on reset
- Noise filter on SCL/SDA inputs
- Latched outputs with 25 mA drive maximum capability for directly driving LEDs
- Latch-up performance exceeds 100 mA per JESD 78, Class II
- ESD protection exceeds JESD 22
- 2000 V Human-Body Model (A114-A)
- 1000 V Charged-Device Model (C101)
GPIO Comparison Table
| Part Number | Bits | V Range | BW | Reset | Int | Description | Package Description | Type |
|---|---|---|---|---|---|---|---|---|
| PCAL6408A | 8 | 1.65 to 5.5 V | 400kHz | Dual VCC, selectable open-drain or push pull outputs | HVQFN-16, TSSOP-16, XQFN-16, XFBGA-16, X2QFN-16 | Agile IO | ||
| PCA9574 | 8 | 1.1 to 3.6 V | 400kHz | maskable | Active low, 3 supplies for level translation, selectable open-drain | HVQFN-16, TSSOP-16 | Standard | |
| PCAL6416A | 16 | 1.65 to 5.5 V | 400kHz | Dual VCC, selectable open-drain or push pull outputs | TSSOP-24, X2QFN-24, HWQFN-24, BGA-24 | Agile IO | ||
| PCA9539R | 16 | 2.3 to 5.5 V | 400kHz | "R" version resets I2C-bus state machine | HVQFN-24, TSSOP-24 | Standard | ||
| PCAL6524 | 24 | 0.8 to 5.5 V | 1MHz | Read all interrupts without clear, device ID, SW reset | QFN-32, UFBGA-32 | Agile IO | ||
| PCAL6534 | 34 | 0.8 to 5.5 V | 1MHz | Read all interrupts without clear, device ID, SW reset | VFBGA-42 | Agile IO | ||
| PCA9698 | 40 | 2.3 to 5.5 V | 1MHz | Output enable, selectable open-drain | TSSOP-56, HVQFN-56 | Standard |
Documentation
Quick reference to our documentation types.
3 documents
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Brochure
Agile I/O GPIO Brochure
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Selector Guide
NXP System Management I2C, I3C and SPI Selector Guide
Design Resources
Engineering Services
To get further assistance directly from NXP, please see our Engineering Services.
1 engineering service
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Independent Design House (IDH)
Embedded Software Design
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