Ultra-Low-Voltage, Level Translating, 34-Bit I2C-Bus/SMBus I/O Expander

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Features

Key Features

  • Operating power supply voltage range of 0.8 V to 3.6 V on the I²C-bus
    • Allows bidirectional voltage-level translation and GPIO expansion between 0.8 V to 3.6 V SCL/SDA and 1.8V, 2.5V, 3.3V, 5.5V I/O ports
  • Low standby current consumption: 2.0 µA typical at 3.3 V VDD(P)
  • Schmitt trigger action allows slow input transition and better switching noise immunity at the SCL and SDA inputs
    • Vhys = 0.05 V (typical) at 0.8 V
    • Vhys = 0.18 V (typical) at 1.8 V
    • Vhys = 0.33 V (typical) at 3.3 V
  • 5.5 V tolerant I/O ports and 3.6 V tolerant I²C-bus lines
  • 1MHz Fast-mode Plus I²C-bus
  • Active LOW reset input (RESET)
  • Open-drain active LOW interrupt output (INT)
  • Internal power-on reset
  • Noise filter on SCL/SDA inputs
  • Latched outputs with 25 mA drive maximum capability for directly driving LEDs
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000 V Human-Body Model (A114-A)
    • 1000 V Charged-Device Model (C101)

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Documentation

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3 documents

Design Files

Hardware

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2 hardware offerings

Engineering Services

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Training

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