4-Bit I²C-Bus and SMBus Low-Power I/O Port with Interrupt and Reset

PCA9537DP

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PCA9537 Block Diagram

PCA9537 Block Diagram

Block diagram: PCA9537DP

Features

Key Features

  • 4-bit I2C-bus GPIO with interrupt and reset
  • Operating power supply voltage range of 2.3 V to 5.5 V
  • 5 V tolerant I/Os
  • Polarity Inversion register
  • Active LOW interrupt output
  • Active LOW reset input
  • Low standby current
  • Noise filter on SCL/SDA inputs
  • No glitch on power-up
  • Internal power-on reset
  • 4 I/O pins that default to 4 inputs
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
  • Offered in TSSOP10 package

Part numbers include: PCA9537DP.

Documentation

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Design Files

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Hardware

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